{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,27]],"date-time":"2025-03-27T20:13:40Z","timestamp":1743106420695,"version":"3.40.3"},"publisher-location":"Berlin, Heidelberg","reference-count":15,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540408222"},{"type":"electronic","value":"9783540452348"}],"license":[{"start":{"date-parts":[[2003,1,1]],"date-time":"2003-01-01T00:00:00Z","timestamp":1041379200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2003]]},"DOI":"10.1007\/978-3-540-45234-8_30","type":"book-chapter","created":{"date-parts":[[2011,1,8]],"date-time":"2011-01-08T01:12:05Z","timestamp":1294449125000},"page":"303-312","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Two Approaches for a Single-Chip FPGA Implementation of an Encryptor\/Decryptor AES Core"],"prefix":"10.1007","author":[{"given":"Nazar A.","family":"Saqib","sequence":"first","affiliation":[]},{"given":"Francisco","family":"Rodr\u00edguez-Henr\u00edquez","sequence":"additional","affiliation":[]},{"given":"Arturo","family":"D\u00edaz-P\u00e9rez","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2003,9,30]]},"reference":[{"key":"30_CR1","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"159","DOI":"10.1007\/3-540-36400-5_13","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2002","author":"G. Bertoni","year":"2003","unstructured":"Bertoni, G., et al.: Efficient Software Implementation of AES on 32-bits Platforms. In: Kaliski Jr., B.S., Ko\u00e7, \u00c7.K., Paar, C. (eds.) CHES 2002. LNCS, vol.\u00a02523, pp. 159\u2013171. Springer, Heidelberg (2003)"},{"key":"30_CR2","doi-asserted-by":"crossref","unstructured":"Daemen, J., Rijmen, V.: The Design of Rijndael, AES-The Advanced Encryption Standard. Springer, Heidelberg (2002)","DOI":"10.1007\/978-3-662-04722-4"},{"key":"30_CR3","unstructured":"Dandalis, A., Prasanna, V.K., Rolim, J.D.P.: A Comparitive Study of Performance of AES Candidates Using FPGAs. In: The 3rd Advanced Encryption Standard (AES3) Candidate Conference, New York, USA, April 13\u201314 (2000)"},{"key":"30_CR4","unstructured":"Elbirt, J., Yip, W., Chetwynd, B., Paar, C.: A FPGA implementation and Performance Evaluation of the AES Block Cipher Candidate Algorithm Finalists. In: The Third AES3 Candidate Conference, New York, April 13-14 (2000)"},{"key":"30_CR5","unstructured":"Gaj, K., Chodowiec, P.: Comparison of the Hardware Performance of the AES Candidates using Reconfigurable Hardware. In: The 3rd Advanced Encryption Standard (AES3) Candidate Conference, New York, USA, April 13-14 (2000)"},{"key":"30_CR6","unstructured":"Gladman, B.: The AES Algorithm (AES) in C and C++ (April 2001), URL: \n\nhttp:\/\/fp.gladman.plus.com\/cryptography_technology\/rijndael\/index.htm"},{"key":"30_CR7","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"342","DOI":"10.1007\/BFb0052247","volume-title":"Advances in Cryptology - CRYPTO \u201997","author":"J. Guajardo","year":"1997","unstructured":"Guajardo, J., Paar, C.: Efficient Algorithms for Elliptic Curve Cryptosytems. In: Kaliski Jr., B.S. (ed.) CRYPTO 1997. LNCS, vol.\u00a01294, pp. 342\u2013356. Springer, Heidelberg (1997)"},{"key":"30_CR8","unstructured":"Ichikawa, T., Kasuya, T., Matsui, M.: Hardware Evaluation of the AES Finalists. In: The 3rd Advanced Encryption Standard (AES3) Candidate Conference, New York, USA, April 13-14 (2000)"},{"key":"30_CR9","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"65","DOI":"10.1007\/3-540-44709-1_7","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2001","author":"M. McLoone","year":"2001","unstructured":"McLoone, M., McCanny, J.V.: High Performance FPGA Rijndael Algorithm Implementations. In: Ko\u00e7, \u00c7.K., Naccache, D., Paar, C. (eds.) CHES 2001. LNCS, vol.\u00a02162, pp. 65\u201376. Springer, Heidelberg (2001)"},{"key":"30_CR10","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"172","DOI":"10.1007\/3-540-36400-5_14","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2002","author":"S. Morioka","year":"2003","unstructured":"Morioka, S., Satoh, A.: An Optimized S-Box Circuit Architecture for Low Power AES Design. In: Kaliski Jr., B.S., Ko\u00e7, \u00c7.K., Paar, C. (eds.) CHES 2002. LNCS, vol.\u00a02523, pp. 172\u2013186. Springer, Heidelberg (2003)"},{"key":"30_CR11","unstructured":"Paar, C.: Efficient VLSI Architectures for Bit Parallel Computation in Galois Fields: PhD thesis: Universitat GH Essen, VDI Verlag (1994)"},{"key":"30_CR12","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"171","DOI":"10.1007\/3-540-44709-1_16","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2001","author":"A. Rudra","year":"2001","unstructured":"Rudra, A., et al.: Efficient Rijndael Encryption Implementation with Composed Field Arithmetic. In: Ko\u00e7, \u00c7.K., Naccache, D., Paar, C. (eds.) CHES 2001. LNCS, vol.\u00a02162, pp. 171\u2013184. Springer, Heidelberg (2001)"},{"key":"30_CR13","volume-title":"Introduction to Cryptography with Coding Theory","author":"W. Trappe","year":"2002","unstructured":"Trappe, W., Washington, L.C.: Introduction to Cryptography with Coding Theory. Prentice-Hall, Upper Saddle River (2002)"},{"key":"30_CR14","unstructured":"Xilinx Virtex, T.M.-E.: 1.8V Field Programmable Gate Arrays, URL (November 2000), \n\nhttp:\/\/www.xilinx.com"},{"key":"30_CR15","unstructured":"http:\/\/ece.gmu.edu\/crypto\/rijndael.htm"}],"container-title":["Lecture Notes in Computer Science","Field Programmable Logic and Application"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-45234-8_30","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,1,16]],"date-time":"2020-01-16T16:03:12Z","timestamp":1579190592000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-45234-8_30"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2003]]},"ISBN":["9783540408222","9783540452348"],"references-count":15,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-45234-8_30","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2003]]},"assertion":[{"value":"30 September 2003","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}