{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,25]],"date-time":"2025-03-25T14:36:35Z","timestamp":1742913395938,"version":"3.40.3"},"publisher-location":"Berlin, Heidelberg","reference-count":11,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540408222"},{"type":"electronic","value":"9783540452348"}],"license":[{"start":{"date-parts":[[2003,1,1]],"date-time":"2003-01-01T00:00:00Z","timestamp":1041379200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2003]]},"DOI":"10.1007\/978-3-540-45234-8_49","type":"book-chapter","created":{"date-parts":[[2011,1,8]],"date-time":"2011-01-08T01:12:05Z","timestamp":1294449125000},"page":"497-506","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements"],"prefix":"10.1007","author":[{"given":"Unai","family":"Bidarte","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Armando","family":"Astarloa","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Aitzol","family":"Zuloaga","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jaime","family":"Jimenez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"I\u00f1igo","family":"Mart\u00ednez de Alegr\u00eda","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2003,9,30]]},"reference":[{"key":"49_CR1","doi-asserted-by":"crossref","unstructured":"Cesrio, W., Baghdadi, A.: Component-Based Design Approach for Multicore SoCs. Design Automation Conference. In: Proceedings of the 39th conference, New Orleans, Louisiana (2002)","DOI":"10.1109\/DAC.2002.1012730"},{"key":"49_CR2","doi-asserted-by":"crossref","unstructured":"Bergamaschi, R., Lee, W.: Designing Systems on Chip Using Cores. Design Automation Conference. In: Proceedings of the 37th conference (2000)","DOI":"10.1145\/337292.337526"},{"issue":"4","key":"49_CR3","doi-asserted-by":"publisher","first-page":"15","DOI":"10.1109\/54.632877","volume":"14","author":"R.K. Gupta","year":"1997","unstructured":"Gupta, R., Zorian, Y.: Introducing core-based system design. IEEE Design and Test of Computers, pp. 15\u201325 (October-December 1997)","journal-title":"IEEE Design & Test of Computers"},{"key":"49_CR4","unstructured":"Xilinx Design Reuse Methodology for ASIC and FPGA Designers, \n\nhttp:\/\/www.xilinx.com\/ipcenter\/designreuse\/docs\/Xilinx-Design-Reuse-Methodology.pdf"},{"key":"49_CR5","unstructured":"Bursky, D.: Core-based design leads the way to flexible system solutions. Electronic Design (May 1997)"},{"key":"49_CR6","doi-asserted-by":"publisher","first-page":"255","DOI":"10.1007\/978-1-4615-6127-9_7","volume-title":"Hardware-Software Co-Design of Embedded Systems","author":"Felice Balarin","year":"1997","unstructured":"Balarin, F.: Hardware-Software Co-design of Embedded Systems: The POLIS approach. Kluwer Academic Press, Dordrecht (1997)"},{"key":"49_CR7","unstructured":"The Connect, T.M.: Bus Architecture, \n\nhttp:\/\/www-3.ibm.com\/chips\/techlib\/techlib.nsf\/productfamilies\/CoreConnect-Bus-Architecture"},{"key":"49_CR8","unstructured":"Wishbone System-on-Chip (SoC) Interconnection Architecture for Portable IP Cores (rev. B.2), Silicore Corporation, Corcoran (USA) (October 2001)"},{"key":"49_CR9","doi-asserted-by":"crossref","unstructured":"Gleerup, T.: Memory Architecture for Efficient Utilization of SDRAM: A Case Study of the Computation\/Memory Access Trade Off. In: Int\u2019l Workshop on Hardware-software Codesign, pp. 51\u201355 (2000)","DOI":"10.1145\/334012.334022"},{"key":"49_CR10","unstructured":"Quinnell, R.: Development tool suits core-based design. Electronic Design (August 1996)"},{"issue":"1","key":"49_CR11","doi-asserted-by":"publisher","first-page":"26","DOI":"10.1145\/371254.371258","volume":"6","author":"Krishnendu Chakrabarty","year":"2001","unstructured":"Chakrabarty, K.: Optimal test access architectures for system-on-a-chip. Transactions on Design Automation of Electronic Systems, 26\u201349 (January 2001)","journal-title":"ACM Transactions on Design Automation of Electronic Systems"}],"container-title":["Lecture Notes in Computer Science","Field Programmable Logic and Application"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-45234-8_49","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,1,16]],"date-time":"2020-01-16T16:03:53Z","timestamp":1579190633000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-45234-8_49"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2003]]},"ISBN":["9783540408222","9783540452348"],"references-count":11,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-45234-8_49","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2003]]},"assertion":[{"value":"30 September 2003","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}