{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,22]],"date-time":"2025-03-22T09:21:25Z","timestamp":1742635285139},"publisher-location":"Berlin, Heidelberg","reference-count":12,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540408338"},{"type":"electronic","value":"9783540452386"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2003]]},"DOI":"10.1007\/978-3-540-45238-6_25","type":"book-chapter","created":{"date-parts":[[2010,6,23]],"date-time":"2010-06-23T20:04:43Z","timestamp":1277323483000},"page":"304-318","source":"Crossref","is-referenced-by-count":17,"title":["Unified Hardware Architecture for 128-Bit Block Ciphers AES and Camellia"],"prefix":"10.1007","author":[{"given":"Akashi","family":"Satoh","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sumio","family":"Morioka","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"25_CR1","unstructured":"National Institute of Standards and Technology (NIST), AES Home Page, \n                    \n                      http:\/\/csrc.nist.gov\/encryption\/aes"},{"key":"25_CR2","unstructured":"National Institute of Standards and Technology (NIST), Data Encryption Standard (DES), FIPS Publication 46-3 (October 1999), \n                    \n                      http:\/\/csrc.nist.gov\/publications\/fips\/fips46-3\/fips46-3.pdf"},{"key":"25_CR3","unstructured":"The Block Cipher Rijndael, \n                    \n                      http:\/\/www.esat.kuleuven.ac.be\/~rijmen\/rijndael"},{"key":"25_CR4","unstructured":"National Institute of Standards and Technology (NIST), Advanced Encryption Standard (AES) FIPS Publication 197 (November 2001), \n                    \n                      http:\/\/csrc.nist.gov\/publications\/fips\/fips197\/fips-197.pdf"},{"key":"25_CR5","unstructured":"NESSIE (New European Scheme for Signatures, Integrity and Encryption), \n                    \n                      https:\/\/www.cosic.esat.kuleuven.ac.be\/nessie"},{"key":"25_CR6","unstructured":"ISO\/IEC, JTC 1\/SC27, Information technology \u2013 Security techniques, \n                    \n                      http:\/\/www.din.de\/ni\/sc27"},{"key":"25_CR7","unstructured":"TV-Anytime Forum, WG Rights Managements and Protection (RMP), \n                    \n                      http:\/\/www.tvanytime.org"},{"key":"25_CR8","unstructured":"CRYPTREC, \n                    \n                      http:\/\/www.ipa.go.jp\/security\/enc\/CRYPTREC"},{"key":"25_CR9","unstructured":"Moriai, S.: Proposal of addition of new cipher suites to TLS to support Camellia, EPOC, and PSEC. In: Proc. the Forty-Eighth IETF (2000), \n                    \n                      http:\/\/www.ietf.org\/proceedings\/00jul\/SLIDES\/tls-cep\/index.html"},{"key":"25_CR10","unstructured":"Aoki, K., Ichikawa, T., Kanda, M., Matsui, M., Moriai, S., Makajima, J., Tokita, T.: Specification of Camellia \u2013 a 128-bit Block Cipher Version 2.0 (2001), \n                    \n                      http:\/\/info.isl.ntt.co.jp\/camellia\/CRYPTREC\/2001\/01espec.pdf"},{"key":"25_CR11","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"239","DOI":"10.1007\/3-540-45682-1_15","volume-title":"Advances in Cryptology - ASIACRYPT 2001","author":"A. Satoh","year":"2001","unstructured":"Satoh, A., Morioka, S., Takano, K., Munetoh, S.: A Compact Rijndael Hardware Architecture with S-box Optimization. In: Boyd, C. (ed.) ASIACRYPT 2001. LNCS, vol.\u00a02248, pp. 239\u2013254. Springer, Heidelberg (2001)"},{"key":"25_CR12","doi-asserted-by":"crossref","unstructured":"Satoh, A., Morioka, S.: Compact Hardware Architecture for 128-bit Block Cipher Camellia. In: Proc. third NESSIE workshop (2002)","DOI":"10.1007\/978-3-540-45238-6_25"}],"container-title":["Lecture Notes in Computer Science","Cryptographic Hardware and Embedded Systems - CHES 2003"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-45238-6_25","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,21]],"date-time":"2019-05-21T07:23:22Z","timestamp":1558423402000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-45238-6_25"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2003]]},"ISBN":["9783540408338","9783540452386"],"references-count":12,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-45238-6_25","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2003]]}}}