{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T23:00:06Z","timestamp":1725577206942},"publisher-location":"Berlin, Heidelberg","reference-count":13,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540669074"},{"type":"electronic","value":"9783540466420"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1999]]},"DOI":"10.1007\/978-3-540-46642-0_53","type":"book-chapter","created":{"date-parts":[[2011,1,28]],"date-time":"2011-01-28T13:35:26Z","timestamp":1296221726000},"page":"364-370","source":"Crossref","is-referenced-by-count":1,"title":["Avoiding Conventional Overheads in Parallel Logic Simulation: A New Architecture"],"prefix":"10.1007","author":[{"given":"Damian","family":"Dalton","sequence":"first","affiliation":[]}],"member":"297","reference":[{"key":"53_CR1","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-642-95424-5","volume-title":"Diagnosis and Reliable Design of Digital Systems","author":"M.A. Breur","year":"1976","unstructured":"Breur, M.A., et al.: Diagnosis and Reliable Design of Digital Systems. Computer Science Press, New York (1976)"},{"key":"53_CR2","volume-title":"Parallel Algorithms for VLSI Computer-Aided Design","author":"P. Banerjee","year":"1994","unstructured":"Banerjee, P.: Parallel Algorithms for VLSI Computer-Aided Design. Prentice-Hall, Englewood Cliffs (1994)"},{"key":"53_CR3","unstructured":"Howard, J., et al.: Introduction to the IBM Los Gatos Simulation Machine. In: Proc IEEE Int. Conf. Computer Design: VLSI in Computers, pp. 580\u2013583 (October 1983)"},{"key":"53_CR4","doi-asserted-by":"crossref","unstructured":"Pfister, G.F.: The Yorktown Simulation Engine. In: Introduction 19th ACM\/IEEE Design Automation Conf., pp. 51\u201354 (June 1982)","DOI":"10.1145\/800263.809185"},{"key":"53_CR5","doi-asserted-by":"crossref","unstructured":"Dunn, L.N.: IBM\u2019s Engineering Design System Support for VLSI Design and Verification. IEEE Design and Test Computers, 30\u201340 (February 1984)","DOI":"10.1109\/MDT.1984.5005573"},{"key":"53_CR6","doi-asserted-by":"crossref","unstructured":"Soule, L., et al.: Parallel Logic Simulation on General purpose machines. In: Proc. Design Automation Conf., pp. 166\u2013171 (June 1988)","DOI":"10.1109\/DAC.1988.14753"},{"key":"53_CR7","doi-asserted-by":"crossref","unstructured":"Mueller-Thuns, R.B., et al.: Benchmarking Parallel Processing Platforms: An Application Perspective. IEEE Trans on Parallel and Distributed systems\u00a04(8) (August 1993)","DOI":"10.1109\/71.238628"},{"issue":"ii","key":"53_CR8","doi-asserted-by":"publisher","first-page":"198","DOI":"10.1145\/358598.358613","volume":"24","author":"K.M. Chandy","year":"1981","unstructured":"Chandy, K.M., et al.: Asynchronous Distributed Simulation via Sequence of Parallel Computations. Comm ACM\u00a024(ii), 198\u2013206 (1981)","journal-title":"Comm ACM"},{"key":"53_CR9","unstructured":"Bryant, R.E.: Simulation of Packet Communications Architecture Computer Systems. Tech report MIT-LCS-TR-188. MIT, Cambridge (1977)"},{"key":"53_CR10","unstructured":"Briner, J.V.: Parallel Mixed Level Simulation of Digital Circuits Virtual Time. Ph.D thesis. Dept of El. Eng, Duke University (1990)"},{"key":"53_CR11","doi-asserted-by":"crossref","unstructured":"Jefferson, D.R.: Virtual time. ACM Trans Programming languages systems, 404\u2013425 (July 1985)","DOI":"10.1145\/3916.3988"},{"key":"53_CR12","doi-asserted-by":"crossref","unstructured":"Soule, L., Gupta, A.: Characterisation of Parallelism and Deadlocks in Distributed Digital Logic Simulation. In: Proc. 26th Design Automation Conf., pp. 81\u201386 (June 1989)","DOI":"10.1145\/74382.74397"},{"key":"53_CR13","doi-asserted-by":"crossref","unstructured":"Wong, Y.-C., et al.: A Parallelism Analyzer for Conservative Parallel Simulation. IEEE Trans on Parallel and Distributed Systems\u00a06(6) (June 1995)","DOI":"10.1109\/71.388043"}],"container-title":["Lecture Notes in Computer Science","High Performance Computing \u2013 HiPC\u201999"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-46642-0_53","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,6,8]],"date-time":"2019-06-08T01:58:11Z","timestamp":1559959091000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-46642-0_53"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1999]]},"ISBN":["9783540669074","9783540466420"],"references-count":13,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-46642-0_53","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1999]]}}}