{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T04:51:58Z","timestamp":1725511918890},"publisher-location":"Berlin, Heidelberg","reference-count":22,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540712671"},{"type":"electronic","value":"9783540712701"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/978-3-540-71270-1_5","type":"book-chapter","created":{"date-parts":[[2007,5,20]],"date-time":"2007-05-20T23:50:51Z","timestamp":1179705051000},"page":"57-68","source":"Crossref","is-referenced-by-count":17,"title":["A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors"],"prefix":"10.1007","author":[{"given":"Praveen","family":"Raghavan","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Satyakiran","family":"Munaga","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Estela Rey","family":"Ramos","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Andy","family":"Lambrechts","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Murali","family":"Jayapala","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Francky","family":"Catthoor","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Diederik","family":"Verkest","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"5_CR1","unstructured":"Sasanka, R.: Energy Efficient Support for All levels of Parallelism for Complex Media Applications. PhD thesis, University of Illinois at Urbana-Champaign (June 2005)"},{"key":"5_CR2","doi-asserted-by":"crossref","unstructured":"Lee, H., Lin, Y., Harel, Y., Woh, M., Mahlke, S., Mudge, T., Flautner, K.: Software defined radio - a high performance embedded challenge. In: Proc. 2005 Intl. Conference on High Performance Embedded Architectures and Compilers (HiPEAC), November (2005)","DOI":"10.1007\/11587514_3"},{"key":"5_CR3","unstructured":"IBM: The Cell Microprocessor (2005), http:\/\/www.research.ibm.com\/cell\/"},{"key":"5_CR4","unstructured":"Van Berkel, K., Heinle, F., Meuwissen, P., Moerman, K., Weiss, M.: Vector processing as an enabler for software-defined radio in handsets from 3G+WLAN onwards. In: Proc. of Software Defined Radio Technical Conference, November, pp. 125\u2013130 (2004)"},{"key":"5_CR5","doi-asserted-by":"crossref","unstructured":"Lin, Y., Lee, H., Woh, M., Harel, Y., Mahlke, S., Mudge, T., Chakrabarti, C., Flautner, K.: SODA: A low-power architecture for software radio. In: Proc. of ISCA (2006)","DOI":"10.1145\/1150019.1136494"},{"key":"5_CR6","unstructured":"Freescale Semiconductor, http:\/\/www.freescale.com\/files\/32bit\/doc\/ref_manual\/MPC7400UM.pdf?srch=1 . Altivec Velocity Engine"},{"key":"5_CR7","unstructured":"Intel: Streaming SIMD Extension 2 (SSE2), http:\/\/www.intel.com\/support\/processors\/sb\/cs-001650.htm"},{"key":"5_CR8","unstructured":"Freescle Semiconductor, http:\/\/www.freescale.com\/webapp\/sps\/site\/overview.jsp?nodeId=0162468rH3bTdGmKqW5Nf2 . Altivec Engine Benchmarks (2006)"},{"key":"5_CR9","unstructured":"DeMan, H.: Ambient intelligence: Giga-scale dreams and nano-scale realities. In: Proc. of ISSCC, Keynote Speech, February (2005)"},{"key":"5_CR10","volume-title":"Interconnection Networks: an Engineering Approach","author":"J. Duato","year":"1997","unstructured":"Duato, J., Yalamanchili, S., Ni, L.: Interconnection Networks: an Engineering Approach. IEEE Computer Society Press, Los Alamitos (1997)"},{"key":"5_CR11","unstructured":"Das, N., Bhattacharya, B.B., Menon, R., Bezrukov, S.L.: Permutation admissibility in shuffle-exchange networks with arbitrary number of stages. In: Intl Conference on High Performance Computing (HIPC), pp. 270\u2013276 (1998)"},{"key":"5_CR12","doi-asserted-by":"crossref","unstructured":"Cam, H., Fortes, J.A.B.: Rearrangeability of shuffle-exchange networks. In: Proc. of Frontiers of Massively Parallel Computation, pp. 303\u2013314 (1990)","DOI":"10.1109\/FMPC.1990.89476"},{"key":"5_CR13","first-page":"409","volume-title":"IEEE Proc. of Computer and Communication Societies (INFOCOM)","author":"I.D. Scherson","year":"1990","unstructured":"Scherson, I.D., Corbett, P.F., Lang, T.: An analytical characterization of generalized shuffle-exchange networks. In: IEEE Proc. of Computer and Communication Societies (INFOCOM), pp. 409\u2013414. IEEE Computer Society Press, Los Alamitos (1990)"},{"key":"5_CR14","first-page":"385","volume-title":"IEEE Transactions on Parallel and Distributed Systems","author":"K. Padmanabhan","year":"1991","unstructured":"Padmanabhan, K.: Design and analysis of even-sized binary shuffle-exchange networks for multiprocessors. In: IEEE Transactions on Parallel and Distributed Systems, pp. 385\u2013397. IEEE Computer Society Press, Los Alamitos (1991)"},{"key":"5_CR15","doi-asserted-by":"crossref","unstructured":"Smith, S.D., Siegel, H.J.: An emulator network for SIMD machine interconnect networks. Computers, 232\u2013241 (1979)","DOI":"10.1145\/800090.802913"},{"issue":"1","key":"5_CR16","doi-asserted-by":"publisher","first-page":"43","DOI":"10.1145\/76372.76376","volume":"33","author":"K. Padmanabhan","year":"1990","unstructured":"Padmanabhan, K.: Cube structures for multiprocessors. Commun. ACM\u00a033(1), 43\u201352 (1990)","journal-title":"Commun. ACM"},{"key":"5_CR17","doi-asserted-by":"crossref","unstructured":"McGregor, J.P., Lee, R.B.: Architecture techniques for acclerating subword permutations with repetitions. In: Trans. on VLSI, pp. 325\u2013335 (2003)","DOI":"10.1109\/TVLSI.2003.812318"},{"key":"5_CR18","doi-asserted-by":"crossref","unstructured":"Yang, X., Vachharajani, M., Lee, R.B.: Fast subword permutation instructions based on butterfly networks. In: Proc. of SPIE, Media Processor, pp. 80\u201386 (2000)","DOI":"10.1117\/12.375241"},{"key":"5_CR19","doi-asserted-by":"crossref","unstructured":"McGregor, J.P., Lee, R.B.: Architectural enhancements for fast subword permutations with repetitions in cryptographic applications. In: Proc. of ICCD (2001)","DOI":"10.1109\/ICCD.2001.955065"},{"key":"5_CR20","doi-asserted-by":"crossref","unstructured":"Elnaggar, A., Aboelaze, M., Al-Naamany, A.: A modified shuffle-free architecture for linear convolution. In: Trans. on Circuits and Systems II, pp. 862\u2013866 (2001)","DOI":"10.1109\/82.965001"},{"key":"5_CR21","unstructured":"Synopsys, Inc.: Physical Compiler User Guide (2006)"},{"key":"5_CR22","unstructured":"Mentor Graphics: ModelSim SE User\u2019s Manual (2006)"}],"container-title":["Lecture Notes in Computer Science","Architecture of Computing Systems - ARCS 2007"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-71270-1_5.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,5,11]],"date-time":"2023-05-11T22:59:45Z","timestamp":1683845985000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-71270-1_5"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["9783540712671","9783540712701"],"references-count":22,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-71270-1_5","relation":{},"subject":[]}}