{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T05:32:45Z","timestamp":1725514365457},"publisher-location":"Berlin, Heidelberg","reference-count":13,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540721598"},{"type":"electronic","value":"9783540721635"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/978-3-540-72163-5_5","type":"book-chapter","created":{"date-parts":[[2007,6,5]],"date-time":"2007-06-05T09:27:19Z","timestamp":1181035639000},"page":"43-50","source":"Crossref","is-referenced-by-count":5,"title":["On the Ability of AES S-Boxes to Secure Against Correlation Power Analysis"],"prefix":"10.1007","author":[{"given":"Zheng-lin","family":"Liu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xu","family":"Guo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yi-cheng","family":"Chen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yu","family":"Han","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xue-cheng","family":"Zou","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"5_CR1","unstructured":"Advanced Encryption Standard (AES). Federal Information Processing Standards Publication 197 (Nov. 2001)"},{"key":"5_CR2","unstructured":"Tiri, K., Akmal, M., Verbauwhede, I.: A Dynamic and Differential CMOS Logic with Signal Independent Power Consumption to Withstand Differential Power Analysis on Smart Cards. In: Proc. of 28th European Solid-State Circuits Conference, pp. 403\u2013406 (2002)"},{"key":"5_CR3","doi-asserted-by":"crossref","unstructured":"Tiri, K., et al.: A side-channel leakage free coprocessor IC in 0.18um CMOS for embedded AES-based cryptographic and biometric processing. In: Proc. ACM\/IEEE Design Automation Conference (DAC 2005), pp. 222\u2013227 (2005)","DOI":"10.1109\/DAC.2005.193805"},{"key":"5_CR4","unstructured":"Suzuki, D., Saeki, M., Ichikawa, T.: Random Switching Logic: A Countermeasure against DPA based on Transition Probability. Cryptology ePrint Archive, Report 2004\/346 (2004)"},{"issue":"2","key":"5_CR5","doi-asserted-by":"publisher","first-page":"71","DOI":"10.1049\/ip-cdt:20050088","volume":"153","author":"D. Shang","year":"2006","unstructured":"Shang, D., et al.: High-security asynchronous circuit implementation of AES. IEE Proceedings Computers and Digital Techniques\u00a0153(2), 71\u201377 (2006)","journal-title":"IEE Proceedings Computers and Digital Techniques"},{"key":"5_CR6","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"198","DOI":"10.1007\/3-540-36400-5_16","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2002","author":"J. Golic","year":"2003","unstructured":"Golic, J., Tymen, C.: Multiplicative Masking and Power Analysis of AES. In: Kaliski Jr., B.S., Ko\u00e7, \u00c7.K., Paar, C. (eds.) CHES 2002. LNCS, vol.\u00a02523, pp. 198\u2013212. Springer, Heidelberg (2003)"},{"key":"5_CR7","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"16","DOI":"10.1007\/978-3-540-28632-5_2","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2004","author":"E. Brier","year":"2004","unstructured":"Brier, E., Clavier, C., Olivier, F.: Correlation Power Analysis with a Leakage Model. In: Joye, M., Quisquater, J.-J. (eds.) CHES 2004. LNCS, vol.\u00a03156, pp. 16\u201329. Springer, Heidelberg (2004)"},{"key":"5_CR8","first-page":"127","volume-title":"Proceedings of CARDIS 2004","author":"S. Guilley","year":"2004","unstructured":"Guilley, S., Hoogvorst, P., Pacalet, R.: Differential Power Analysis Model and some Results. In: Proceedings of CARDIS 2004, pp. 127\u2013142. Kluwer Academic Publishers, Dordrecht (2004)"},{"key":"5_CR9","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"67","DOI":"10.1007\/3-540-45760-7_6","volume-title":"Topics in Cryptology - CT-RSA 2002","author":"J. Wolkerstorfer","year":"2002","unstructured":"Wolkerstorfer, J., Oswald, E., Lamberger, M.: An ASIC Implementation of the AES S-boxes. In: Preneel, B. (ed.) CT-RSA 2002. LNCS, vol.\u00a02271, pp. 67\u201378. Springer, Heidelberg (2002)"},{"key":"5_CR10","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"172","DOI":"10.1007\/3-540-36400-5_14","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2002","author":"S. Morioka","year":"2003","unstructured":"Morioka, S., Satoh, A.: An optimized S-box circuit architecture for low power AES design. In: Kaliski Jr., B.S., Ko\u00e7, \u00c7.K., Paar, C. (eds.) CHES 2002. LNCS, vol.\u00a02523, pp. 172\u2013186. Springer, Heidelberg (2003)"},{"key":"5_CR11","doi-asserted-by":"publisher","first-page":"277","DOI":"10.1145\/988952.989019","volume-title":"GLSVLSI 2004","author":"G. Bertoni","year":"2004","unstructured":"Bertoni, G., et al.: Power-efficient ASIC Synthesis of Cryptographic Sboxes. In: GLSVLSI 2004, pp. 277\u2013281. ACM Press, New York (2004)"},{"key":"5_CR12","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"172","DOI":"10.1007\/3-540-36400-5_14","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2002","author":"S. Morioka","year":"2003","unstructured":"Morioka, S., Satoh, A.: An optimized S-box circuit architecture for low power AES design. In: Kaliski Jr., B.S., Ko\u00e7, \u00c7.K., Paar, C. (eds.) CHES 2002. LNCS, vol.\u00a02523, pp. 172\u2013186. Springer, Heidelberg (2003)"},{"key":"5_CR13","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"222","DOI":"10.1007\/978-3-540-24660-2_18","volume-title":"Topics in Cryptology \u2013 CT-RSA 2004","author":"S. Mangard","year":"2004","unstructured":"Mangard, S.: Hardware Countermeasures against DPA - A Statistical Analysis of Their Effectiveness. In: Okamoto, T. (ed.) CT-RSA 2004. LNCS, vol.\u00a02964, pp. 222\u2013235. Springer, Heidelberg (2004)"}],"container-title":["Lecture Notes in Computer Science","Information Security Practice and Experience"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-72163-5_5.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,11,19]],"date-time":"2020-11-19T05:29:24Z","timestamp":1605763764000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-72163-5_5"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["9783540721598","9783540721635"],"references-count":13,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-72163-5_5","relation":{},"subject":[]}}