{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T22:04:10Z","timestamp":1725487450296},"publisher-location":"Berlin, Heidelberg","reference-count":6,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540725879"},{"type":"electronic","value":"9783540725886"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007]]},"DOI":"10.1007\/978-3-540-72588-6_68","type":"book-chapter","created":{"date-parts":[[2007,7,16]],"date-time":"2007-07-16T14:35:23Z","timestamp":1184596523000},"page":"419-423","source":"Crossref","is-referenced-by-count":1,"title":["A Graph-Theory Algorithm for WCET Estimation"],"prefix":"10.1007","author":[{"given":"Guowei","family":"Wu","sequence":"first","affiliation":[]},{"given":"Kai","family":"Yao","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"68_CR1","unstructured":"Liu, J.C., Lee, H.J.: Deterministic Upperbounds of Worst-case Execution Times of Cached Programs. In: Proceeding of the 15th IEEE Read-Time Systems Symposium, New York, vol.\u00a030, pp. 182\u2013191 (1998)"},{"key":"68_CR2","unstructured":"Lim, S.S., Young, H.B., Gu, T.J.: An Accurate Worst Case Timing Analysis Technique for RISC Processors. In: Proceeding of the 15th IEEE Real-Time Systems Symposium, New York, vol.\u00a030, pp. 97\u2013108 (1998)"},{"issue":"7","key":"68_CR3","first-page":"875","volume":"15","author":"C.S. Alan","year":"1999","unstructured":"Alan, C.S.: Reasoning about Time in Higher-level Language Software. IEEE Transactions on Software Engineering\u00a015(7), 875\u2013889 (1999)","journal-title":"IEEE Transactions on Software Engineering"},{"key":"68_CR4","unstructured":"Robert, A.: Bounding Worst-case Instruction Cache Performance. In: Proceeding of the 15th IEEE Real-Time Systems Symposium, New York, vol.\u00a030, pp. 172\u2013181 (1998)"},{"key":"68_CR5","unstructured":"Li, Y.S., Malik, S., Wolfe, A.: Cache Modeling for Real-Time Software Beyond Direct Mapped Instruction Caches. In: Proceeding of the 17th IEEE Real-Time Systems Symposium, New York, vol.\u00a035, pp. 35\u201342 (2002)"},{"key":"68_CR6","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"557","DOI":"10.1007\/11535409_81","volume-title":"Embedded Software and Systems","author":"G. Wu","year":"2005","unstructured":"Wu, G., Yao, L.: A New WCET Estimation Algorithm based on Instruction Cache and Prefetching Combined Model. In: Wu, Z., Chen, C., Guo, M., Bu, J. (eds.) ICESS 2004. LNCS, vol.\u00a03605, pp. 557\u2013562. Springer, Heidelberg (2005)"}],"container-title":["Lecture Notes in Computer Science","Computational Science \u2013 ICCS 2007"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-72588-6_68","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,2,17]],"date-time":"2019-02-17T21:28:30Z","timestamp":1550438910000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-72588-6_68"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007]]},"ISBN":["9783540725879","9783540725886"],"references-count":6,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-72588-6_68","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2007]]}}}