{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,27]],"date-time":"2026-10-27T18:04:06Z","timestamp":1793124246735,"version":"4.5.0"},"publisher-location":"Berlin, Heidelberg","reference-count":8,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"value":"9783540744610","type":"print"},{"value":"9783540744627","type":"electronic"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/978-3-540-74462-7_10","type":"book-chapter","created":{"date-parts":[[2007,9,13]],"date-time":"2007-09-13T02:37:28Z","timestamp":1189651048000},"page":"134-146","source":"Crossref","is-referenced-by-count":25,"title":["Changing the Odds Against Masked Logic"],"prefix":"10.1007","author":[{"given":"Kris","family":"Tiri","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Patrick","family":"Schaumont","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","reference":[{"issue":"4","key":"10_CR1","doi-asserted-by":"publisher","first-page":"473","DOI":"10.1109\/4.126534","volume":"27","author":"A. Chandrakasan","year":"1992","unstructured":"Chandrakasan, A., Sheng, S., Brodersen, R.: Low Power CMOS Design. IEEE Journal of Solid-State Circuits (JSSC)\u00a027(4), 473\u2013484 (1992)","journal-title":"IEEE Journal of Solid-State Circuits (JSSC)"},{"key":"10_CR2","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"351","DOI":"10.1007\/978-3-540-30574-3_24","volume-title":"Topics in Cryptology \u2013 CT-RSA 2005","author":"S. Mangard","year":"2005","unstructured":"Mangard, S., Popp, T., Gammel, B.: Side-Channel Leakage of Masked CMOS Gates. In: Menezes, A.J. (ed.) CT-RSA 2005. LNCS, vol.\u00a03376, pp. 351\u2013365. Springer, Heidelberg (2005)"},{"key":"10_CR3","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"309","DOI":"10.1007\/11545262_23","volume-title":"Cryptographic Hardware and Embedded Systems \u2013 CHES 2005","author":"E. Peeters","year":"2005","unstructured":"Peeters, E., Standaert, F., Donckers, N., Quisquater, J.: Improved Higher Order Side-Channel Attacks with FPGA experiments. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, vol.\u00a03659, pp. 309\u2013323. Springer, Heidelberg (2005)"},{"issue":"11","key":"10_CR4","doi-asserted-by":"publisher","first-page":"1576","DOI":"10.1109\/5.964439","volume":"89","author":"B. Moyer","year":"2001","unstructured":"Moyer, B.: Low-power design for embedded processors. Proceedings of the IEEE\u00a089(11), 1576\u20131587 (2001)","journal-title":"Proceedings of the IEEE"},{"key":"10_CR5","unstructured":"Suzuki, D., Saeki, M., Ichikawa, T.: Random Switching Logic: A Countermeasure against DPA based on Transition Probability. Cryptology ePrint Archive, Report 2004\/346 (2004)"},{"key":"10_CR6","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"366","DOI":"10.1007\/11545262_27","volume-title":"Cryptographic Hardware and Embedded Systems \u2013 CHES 2005","author":"D. Suzuki","year":"2005","unstructured":"Suzuki, D., Saeki, M., Ichikawa, T.: DPA Leakage Models for CMOS Logic Circuits. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, vol.\u00a03659, pp. 366\u2013382. Springer, Heidelberg (2005)"},{"key":"10_CR7","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"354","DOI":"10.1007\/11545262_26","volume-title":"Cryptographic Hardware and Embedded Systems \u2013 CHES 2005","author":"K. Tiri","year":"2005","unstructured":"Tiri, K., Hwang, D., Hodjat, A., Lai, B., Yang, S., Schaumont, P., Verbauwhede, I.: Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, vol.\u00a03659, pp. 354\u2013365. Springer, Heidelberg (2005)"},{"key":"10_CR8","volume-title":"Principles of CMOS VLSI Design","author":"N. Weste","year":"2005","unstructured":"Weste, N., Harris, D.: Principles of CMOS VLSI Design, 3rd edn. Addison-Wesley, Reading (2005)","edition":"3"}],"container-title":["Lecture Notes in Computer Science","Selected Areas in Cryptography"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-74462-7_10.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T06:30:32Z","timestamp":1619505032000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-74462-7_10"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["9783540744610","9783540744627"],"references-count":8,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-74462-7_10","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"value":"0302-9743","type":"print"},{"value":"1611-3349","type":"electronic"}],"subject":[]}}