{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T06:55:16Z","timestamp":1747810516855},"publisher-location":"Berlin, Heidelberg","reference-count":10,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540744658"},{"type":"electronic","value":"9783540744665"}],"license":[{"start":{"date-parts":[[2007,1,1]],"date-time":"2007-01-01T00:00:00Z","timestamp":1167609600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007]]},"DOI":"10.1007\/978-3-540-74466-5_6","type":"book-chapter","created":{"date-parts":[[2007,8,27]],"date-time":"2007-08-27T14:54:32Z","timestamp":1188226472000},"page":"42-51","update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":11,"title":["Building Portable Thread Schedulers for Hierarchical Multiprocessors: The BubbleSched Framework"],"prefix":"10.1007","author":[{"given":"Samuel","family":"Thibault","sequence":"first","affiliation":[]},{"given":"Raymond","family":"Namyst","sequence":"additional","affiliation":[]},{"given":"Pierre-Andr\u00e9","family":"Wacrenier","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"6_CR1","unstructured":"Thibault, S.: A flexible thread scheduler for hierarchical multiprocessor machines. In: Second International Workshop on Operating Systems, Programming Environments and Management Tools for High-Performance Computing on Clusters (COSET-2), Cambridge \/ USA. ICS \/ ACM \/ IRISA (2005)"},{"key":"6_CR2","doi-asserted-by":"crossref","unstructured":"Marathe, J., Mueller, F.: Hardware Profile-guided Automatic Page Placement for ccNUMA Systems. In: Sixth Symposium on Principles and Practice of Parallel Programming (March 2006)","DOI":"10.1145\/1122971.1122987"},{"key":"6_CR3","doi-asserted-by":"publisher","first-page":"131","DOI":"10.1145\/1088149.1088167","volume-title":"19th ACM International Conference on Supercomputing","author":"X. Shen","year":"2005","unstructured":"Shen, X., Gao, Y., Ding, C., Archambault, R.: Lightweight reference affinity analysis. In: 19th ACM International Conference on Supercomputing, Cambridge, MA, USA, pp. 131\u2013140. ACM Press, New York (2005)"},{"key":"6_CR4","volume-title":"Int. Conf. on Parallel and Distributed Systems","author":"D. Durand","year":"1996","unstructured":"Durand, D., Montaut, T., Kervella, L., Jalby, W.: Impact of memory contention on dynamic scheduling on NUMA multiprocessors. In: Int. Conf. on Parallel and Distributed Systems, vol.\u00a07. IEEE Computer Society Press, Los Alamitos (1996)"},{"key":"6_CR5","doi-asserted-by":"crossref","unstructured":"H\u00e9non, P., Ramet, P., Roman, J.: PaStiX: A parallel sparse direct solver based on a static scheduling for mixed 1d\/2d block distributions. In: Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing (January 2000)","DOI":"10.1007\/3-540-45591-4_70"},{"key":"6_CR6","unstructured":"Thibault, S.: BubbleSched API, \n                    \n                      http:\/\/runtime.futurs.inria.fr\/marcel\/doc\/"},{"key":"6_CR7","doi-asserted-by":"crossref","unstructured":"Danjean, V., Namyst, R.: An efficient multi-level trace toolkit for multi-threaded applications. In: EuroPar, Lisbonne, Portugal (September 2005)","DOI":"10.1007\/11549468_21"},{"key":"6_CR8","unstructured":"Barreto, L.P., Muller, G.: Bossa: une approche langage \u00e1 la conception d\u2019ordonnanceurs de processus. In: Rencontres francophones en Parall\u00e9lisme, Architecture, Syst\u00e9me et Composant (RenPar\u00a014), Hammamet, Tunisie (April 2002)"},{"key":"6_CR9","unstructured":"Steckermeier, M., Bellosa, F.: Using locality information in userlevel scheduling. Technical Report TR-95-14, University of Erlangen-N\u0169rnberg (December 1995)"},{"key":"6_CR10","unstructured":"Fedorova, A.: Operating System Scheduling for Chip Multithreaded Processors. PhD thesis, Harvard University, Cambridge, Massachusetts (2006)"}],"container-title":["Lecture Notes in Computer Science","Euro-Par 2007 Parallel Processing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-74466-5_6","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,4,20]],"date-time":"2020-04-20T00:19:30Z","timestamp":1587341970000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-74466-5_6"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007]]},"ISBN":["9783540744658","9783540744665"],"references-count":10,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-74466-5_6","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2007]]},"assertion":[{"value":"This content has been made available to all.","name":"free","label":"Free to read"}]}}