{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T22:50:13Z","timestamp":1725490213383},"publisher-location":"Berlin, Heidelberg","reference-count":12,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540747413"},{"type":"electronic","value":"9783540747420"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007]]},"DOI":"10.1007\/978-3-540-74742-0_23","type":"book-chapter","created":{"date-parts":[[2007,8,21]],"date-time":"2007-08-21T11:03:30Z","timestamp":1187694210000},"page":"235-244","source":"Crossref","is-referenced-by-count":0,"title":["A Parallel Infrastructure on Dynamic EPIC SMT and Its Speculation Optimization"],"prefix":"10.1007","author":[{"given":"Qingying","family":"Deng","sequence":"first","affiliation":[]},{"given":"Minxuan","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Jiang","family":"Jiang","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"23_CR1","doi-asserted-by":"crossref","unstructured":"Tullsen, D., Eggers, S., Levy, H.: Simultaneous Multithreading: Maximizing On- Chip Parallelism. In: The 22rd Annual International Symposium on Computer Architecture (ISCA), pp. 392\u2013403 (1995)","DOI":"10.1145\/225830.224449"},{"issue":"5","key":"23_CR2","doi-asserted-by":"publisher","first-page":"2","DOI":"10.1145\/248208.237140","volume":"30","author":"K. Olukotun","year":"1996","unstructured":"Olukotun, K., Nayfeh, B.A., Hammond, L., Wilson, K., Chang, K.: The Case for a Single-Chip Multiprocessor. SIGOPS Oper. Syst. Rev.\u00a030(5), 2\u201311 (1996)","journal-title":"SIGOPS Oper. Syst. Rev."},{"key":"23_CR3","doi-asserted-by":"crossref","unstructured":"Li, Y., Brooks, D., Hu, Z., Skadron, K., Bose, P.: Understanding the Energy Efficiency of Simultaneous Multithreading. In: The 2004 International Symposium on Low Power Electronics and Design, pp. 44\u201349 (2004)","DOI":"10.1145\/1013235.1013251"},{"key":"23_CR4","doi-asserted-by":"crossref","unstructured":"Sasanka, R., Adve, S.V., Chen, Y.-K., Debes, E.: The Energy Efficiency of CMP vs. SMT for Multimedia Workloads. In: The 18th Annual International Conference on Supercomputing, pp. 196\u2013206 (2004)","DOI":"10.1145\/1006209.1006238"},{"key":"23_CR5","doi-asserted-by":"crossref","unstructured":"Kaxiras, S., Narlikar, G., Berenbaum, A.D., Hu, Z.: Comparing Power Consumption of an SMT and a CMP DSP for Mobile Phone Workloads. In: The 2001 International Conference on Compilers, Architecture,and Synthesis for Embedded Systems, pp. 211\u2013220 (2001)","DOI":"10.1145\/502217.502254"},{"key":"23_CR6","unstructured":"Li, Y., Skadron, K., Hu, Z., Brooks, D.: Performance, Energy, and Thermal Considerations for SMT and CMP Architectures. In: The Eleventh IEEE International Symposium on High Performance Computer Architecture (HPCA), pp. 71\u201382 (2005)"},{"key":"23_CR7","doi-asserted-by":"crossref","unstructured":"Lo, J.L., Eggers, S.J., Levy, H.M., Parekh, S.S., Tullsen, D.M.: Tuning Compiler Optimizations for Simultaneous Multithreading. In: The 30th Micro, pp. 114\u2013124 (1997)","DOI":"10.1109\/MICRO.1997.645803"},{"key":"23_CR8","unstructured":"Jianhua, Y., Hongmei, W.: Actuality and Trend of Parallel Language and Compilation. Computer Engineering, pp. 97\u201398 (December 2004)"},{"key":"23_CR9","unstructured":"OpenUH: An Optimizing, Portable OpenMP Compiler (2006), http:\/\/www2.cs.uh.edu\/copper\/pubs.html"},{"key":"23_CR10","doi-asserted-by":"crossref","unstructured":"Akkary, H., Driscoll, M.A.: A dynamic multithreading processor. In: The 31st annual ACM\/IEEE international symposium on Microarchitecture, pp. 226\u2013236 (1998)","DOI":"10.1109\/MICRO.1998.742784"},{"issue":"2","key":"23_CR11","doi-asserted-by":"crossref","first-page":"37","DOI":"10.1109\/2.820037","volume":"32","author":"M.S. Schlansker","year":"2000","unstructured":"Schlansker, M.S., Rau, B.R.: EPIC: Explicitly Parallel Instruction Computing. IEEE Computer\u00a032(2), 37\u201345 (2000)","journal-title":"IEEE Computer"},{"key":"23_CR12","unstructured":"Itanium Processor Microarchitecture Reference: for Software Optimization 05 (2002), http:\/\/www.developer.intel.com\/design\/ia64\/itanium.htm"}],"container-title":["Lecture Notes in Computer Science","Parallel and Distributed Processing and Applications"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-74742-0_23","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,2]],"date-time":"2019-05-02T09:32:09Z","timestamp":1556789529000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-74742-0_23"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007]]},"ISBN":["9783540747413","9783540747420"],"references-count":12,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-74742-0_23","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2007]]}}}