{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T23:56:58Z","timestamp":1725494218704},"publisher-location":"Berlin, Heidelberg","reference-count":16,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540768364"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/978-3-540-76837-1_11","type":"book-chapter","created":{"date-parts":[[2007,11,6]],"date-time":"2007-11-06T05:25:50Z","timestamp":1194326750000},"page":"70-79","source":"Crossref","is-referenced-by-count":0,"title":["An Optimal Design Method for De-synchronous Circuit Based on Control Graph"],"prefix":"10.1007","author":[{"given":"Gang","family":"Jin","sequence":"first","affiliation":[]},{"given":"Lei","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Zhiying","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Kui","family":"Dai","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"11_CR1","unstructured":"Cortadella, J., Kondratyev, A., Lavagno, L., Sotiriou, C.: A concurrent model for desynchronization. In: IWLS 2003 (2003)"},{"key":"11_CR2","doi-asserted-by":"crossref","unstructured":"Sutherland, I.E.: Micropipelines. Communications of the ACM\u00a032 (1989)","DOI":"10.1145\/63526.63532"},{"key":"11_CR3","doi-asserted-by":"crossref","unstructured":"Furber, S.B., Garside, J.D., Gilbert, D.A.: Amulet3: A high-performance self-timed arm microprocessor. In: Proc. International Conf. Computer Design(ICCD) (October 1998)","DOI":"10.1109\/ICCD.1998.727058"},{"key":"11_CR4","doi-asserted-by":"crossref","unstructured":"Bardsley, A., Edwards, D.: Coompiling the language Balsa to delay-insensitive hardware (1997)","DOI":"10.1007\/978-0-387-35064-6_11"},{"key":"11_CR5","volume-title":"Handshake Circuits: an Asynchronous Architecture for VLSI Programming","author":"K. Berkel van","year":"2001","unstructured":"van Berkel, K.: Handshake Circuits: an Asynchronous Architecture for VLSI Programming. Cambridge University Press, Cambridge (2001)"},{"key":"11_CR6","first-page":"84","volume-title":"Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems","author":"I. Blunno","year":"2000","unstructured":"Blunno, I., Lavagno, L.: Automated synthesis of micro-pipelines from behavioral verilog hdl. In: Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 84\u201392. IEEE Computer Society Press, Los Alamitos (2000)"},{"key":"11_CR7","first-page":"114","volume-title":"Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems","author":"M. Ligthart","year":"2000","unstructured":"Ligthart, M., Fant, K., Smith, R., Taubin, A., Kondratyev, A.: Asynchronous dsign using commercial hdl synthesis tools. In: Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 114\u2013125. IEEE Computer Society Press, Los Alamitos (2000)"},{"key":"11_CR8","doi-asserted-by":"publisher","first-page":"1031","DOI":"10.1109\/12.537126","volume":"45","author":"D.H. Linder","year":"1996","unstructured":"Linder, D.H., Harden, J.C.: Phased logic: Supporting the synchronous design paradigm with delay-insensitive circuitry. IEEE Transactions on Computers\u00a045, 1031\u20131044 (1996)","journal-title":"IEEE Transactions on Computers"},{"key":"11_CR9","doi-asserted-by":"crossref","unstructured":"Davare, A., Lwin, K., Kondratyev, A., Sangiovanni-Vincentelli, A.: The best of both worlds: The efficient asynchronous implementation of synchronous specifications. In: Design Automation Conference (DAC), ACM\/IEEE (June 2004)","DOI":"10.1145\/996566.996727"},{"key":"11_CR10","doi-asserted-by":"crossref","unstructured":"Yong, L., Lei, W., Rui, G., Kui, D., Zhi-ying, W.: Research and implementation of a 32-bits asynchronous multiplier. Journal of Computer Research and Development\u00a043 (November 2006)","DOI":"10.1360\/crad20061218"},{"key":"11_CR11","first-page":"149","volume-title":"ICSICT 2006","author":"R. Gong","year":"2004","unstructured":"Gong, R., Wang, L., Li, Y., Dai, K.: A de-synchronous circuit design flow using hybrid cell library. In: ICSICT 2006. Proc. of 8th International Conference on Solid-State and Integrated-Circuit Technology, Madrid, Spain, pp. 149\u2013158. IEEE Computer Society Press, Los Alamitos (2004)"},{"key":"11_CR12","doi-asserted-by":"crossref","unstructured":"Blunno, I., Cortadella, J., Kondratyev, A., Lavagno, L., Lwin, K., Sotiriou, C.: Handshake protocols for de-synchronization. In: Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, Shanghai, China","DOI":"10.1109\/ASYNC.2004.1299296"},{"key":"11_CR13","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"502","DOI":"10.1007\/11859802_50","volume-title":"Advances in Computer Systems Architecture","author":"L. Wang","year":"2006","unstructured":"Wang, L., Zhi-ying, W., Dai, K.: Cycle period analysis and optimization of asynchronous timed circuits. In: Jesshope, C., Egan, C. (eds.) ACSAC 2006. LNCS, vol.\u00a04186, pp. 502\u2013508. Springer, Heidelberg (2006)"},{"key":"11_CR14","unstructured":"Wang, L.: Design and Anslysis Techniques of Asynchronous Embedded Microprocessors. Ph.d. thesis, National University of Defence technology, Changsha (September 2006)"},{"key":"11_CR15","doi-asserted-by":"crossref","unstructured":"Murata, T.: Petri nets: Properties, analysis and applications. Proceedings of the IEEE, 541\u2013580 (April 1989)","DOI":"10.1109\/5.24143"},{"key":"11_CR16","doi-asserted-by":"crossref","unstructured":"Karmarkar, N.: A new polynomial-time algorithm for linear programming. In: Proceedings of the 16th Annual ACM Symposium on Theory of Computing, pp. 302\u2013311 (April 1984)","DOI":"10.1145\/800057.808695"}],"container-title":["Lecture Notes in Computer Science","Advanced Parallel Processing Technologies"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-76837-1_11.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T06:40:46Z","timestamp":1619505646000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-76837-1_11"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["9783540768364"],"references-count":16,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-76837-1_11","relation":{},"subject":[]}}