{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T23:56:35Z","timestamp":1725494195100},"publisher-location":"Berlin, Heidelberg","reference-count":9,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540768364"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/978-3-540-76837-1_12","type":"book-chapter","created":{"date-parts":[[2007,11,6]],"date-time":"2007-11-06T05:25:50Z","timestamp":1194326750000},"page":"80-89","source":"Crossref","is-referenced-by-count":0,"title":["Evaluating a Low-Power Dual-Core Architecture"],"prefix":"10.1007","author":[{"given":"Yijun","family":"Liu","sequence":"first","affiliation":[]},{"given":"Pinghua","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Guobo","family":"Xie","sequence":"additional","affiliation":[]},{"given":"Guangcong","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Zhenkun","family":"Li","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"12_CR1","unstructured":"ITRS, International Technology Roadmap for Semiconductors Report, 2006 Update (2006), http:\/\/www.itrs.net\/"},{"key":"12_CR2","doi-asserted-by":"crossref","unstructured":"Veen, A.H.: Dataflow machine architecture. ACM Computing Surveys (December 1986)","DOI":"10.1145\/27633.28055"},{"key":"12_CR3","unstructured":"Gurd, J., Watson, I.: A data driven system for high speed parallel computer. Computer Design (June 1980)"},{"key":"12_CR4","volume-title":"Computer Architecture: A Quantitative approach","author":"J.L. Hennessy","year":"2003","unstructured":"Hennessy, J.L., Patterson, D.A.: Computer Architecture: A Quantitative approach. Morgan Kaufmann, San Francisco (2003)"},{"key":"12_CR5","series-title":"Lecture Notes in Computer Science","volume-title":"Integrated Circuit and System Design","author":"Y. Liu","year":"2006","unstructured":"Liu, Y., et al.: The design of a dataflow coprocessor for low power embedded hierarchical processing. In: Vounckx, J., Azemard, N., Maurine, P. (eds.) PATMOS 2006. LNCS, vol.\u00a04148, Springer, Heidelberg (2006)"},{"key":"12_CR6","doi-asserted-by":"crossref","unstructured":"Dennis, J.B., Misunas, D.P.: Preliminary architecture for a basic data-flow processor. In: Proceedings of the 2nd Annual Symposium on Computer Architecture (December 1974)","DOI":"10.1145\/641675.642111"},{"volume-title":"Principles of Asynchronous Circuit Design: A systems Perspective","year":"2001","key":"12_CR7","unstructured":"Spars\u00f8, J., Furber, S. (eds.): Principles of Asynchronous Circuit Design: A systems Perspective. Kluwer Academic Publishers, Dordrecht (2001)"},{"key":"12_CR8","unstructured":"Proakis, J.G., Manolakis, D.: Digital Signal Processing: Principles, Algorithms and Applications, 3rd edn. Prentice-Hall Engineering\/ Science\/Mathematics (1995)"},{"key":"12_CR9","doi-asserted-by":"crossref","unstructured":"Amdahl, G.M.: Validity of the single processor approach to achieving large scale computer capability. In: Proceedings of AFIPS Spring Joint Computer Conference (1967)","DOI":"10.1145\/1465482.1465560"}],"container-title":["Lecture Notes in Computer Science","Advanced Parallel Processing Technologies"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-76837-1_12.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T06:40:47Z","timestamp":1619505647000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-76837-1_12"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["9783540768364"],"references-count":9,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-76837-1_12","relation":{},"subject":[]}}