{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,23]],"date-time":"2025-01-23T08:40:03Z","timestamp":1737621603211,"version":"3.33.0"},"publisher-location":"Berlin, Heidelberg","reference-count":37,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540772712"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/978-3-540-77272-9_11","type":"book-chapter","created":{"date-parts":[[2007,12,6]],"date-time":"2007-12-06T11:56:55Z","timestamp":1196942215000},"page":"170-184","source":"Crossref","is-referenced-by-count":7,"title":["Cryptographic Side-Channels from Low-Power Cache Memory"],"prefix":"10.1007","author":[{"given":"Philipp","family":"Grabher","sequence":"first","affiliation":[]},{"given":"Johann","family":"Gro\u00dfsch\u00e4dl","sequence":"additional","affiliation":[]},{"given":"Daniel","family":"Page","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"11_CR1","doi-asserted-by":"crossref","unstructured":"Ac\u0131i\u00e7mez, O.: Yet Another MicroArchitectural Attack: Exploiting I-cache. In: Cryptology ePrint Archive, Report 2007\/164 (2007)","DOI":"10.1145\/1314466.1314469"},{"key":"11_CR2","unstructured":"Ac\u0131i\u00e7mez, O., Gueron, S., Seifert, J-P.: New Branch Prediction Vulnerabilities in OpenSSL and Necessary Software Countermeasures. In: Cryptology ePrint Archive, Report 2007\/039 (2007)"},{"key":"11_CR3","doi-asserted-by":"crossref","unstructured":"Ac\u0131i\u00e7mez, O., Ko\u00e7, \u00c7.K.: Trace-Driven Cache Attacks on AES. In: Cryptology ePrint Archive, Report 2006\/138 (2006)","DOI":"10.1007\/11935308_9"},{"key":"11_CR4","unstructured":"Ac\u0131i\u00e7mez, O., Ko\u00e7, \u00c7.K., Seifert, J-P.: On the Power of Simple Branch Prediction Analysis. Cryptology ePrint Archive\u00a0 Report 2006\/351 (2006)"},{"key":"11_CR5","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"225","DOI":"10.1007\/11967668_15","volume-title":"CT-RSA 2007","author":"O. Ac\u0131i\u00e7mez","year":"2006","unstructured":"Ac\u0131i\u00e7mez, O., Seifert, J-P., Ko\u00e7, \u00c7.K.: Predicting Secret Keys via Branch Prediction. In: Abe, M. (ed.) CT-RSA 2007. LNCS, vol.\u00a04377, pp. 225\u2013242. Springer, Heidelberg (2006)"},{"key":"11_CR6","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"271","DOI":"10.1007\/11967668_18","volume-title":"CT-RSA 2007","author":"O. Ac\u0131i\u00e7mez","year":"2006","unstructured":"Ac\u0131i\u00e7mez, O., Schindler, W., Ko\u00e7., \u00c7.K.: Cache Based Remote Timing Attacks on the AES. In: Abe, M. (ed.) CT-RSA 2007. LNCS, vol.\u00a04377, pp. 271\u2013286. Springer, Heidelberg (2006)"},{"key":"11_CR7","unstructured":"Agosta, G., Pelosi, G.: Countermeasures for the Simple Branch Prediction Analysis. In: Cryptology ePrint Archive, Report 2006\/482 (2006)"},{"key":"11_CR8","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"29","DOI":"10.1007\/3-540-36400-5_4","volume-title":"CHES 2002","author":"D. Agrawal","year":"2003","unstructured":"Agrawal, D., Archambeault, B., Rao, J.R., Rohatgi, P.: The EM Side-Channel(s). In: Kaliski Jr., B.S., Ko\u00e7, \u00c7.K., Paar, C. (eds.) CHES 2002. LNCS, vol.\u00a02523, pp. 29\u201345. Springer, Heidelberg (2003)"},{"key":"11_CR9","unstructured":"Bernstein, D.J.: Cache-timing Attacks on AES, http:\/\/cr.yp.to\/antiforgery\/cachetiming-20050414.pdf"},{"key":"11_CR10","doi-asserted-by":"crossref","unstructured":"Bertoni, G., Zaccaria, V., Breveglieri, L., Monchiero, M., Palermo, G.: AES Power Attack Based on Induced Cache Miss and Countermeasure. In: ITCC. IEEE Conference on Information Technology: Coding and Computing (2005)","DOI":"10.1109\/ITCC.2005.62"},{"key":"11_CR11","unstructured":"Bonneau, J.: Robust Final-Round Cache-Trace Attacks Against AES. In: Cryptology ePrint Archive, Report 2006\/374 (2006)"},{"key":"11_CR12","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"201","DOI":"10.1007\/11894063_16","volume-title":"CHES 2006","author":"J. Bonneau","year":"2006","unstructured":"Bonneau, J., Mironov, I.: Cache-Collision Timing Attacks Against AES. In: Goubin, L., Matsui, M. (eds.) CHES 2006. LNCS, vol.\u00a04249, pp. 201\u2013215. Springer, Heidelberg (2006)"},{"key":"11_CR13","unstructured":"Brickell, E., Graunke, G., Neve, M., Seifert, J-P.: Software Mitigations to Hedge AES Against Cache-based Software Side Channel Vulnerabilities. In: Cryptology ePrint Archive, Report 2006\/052 (2006)"},{"key":"11_CR14","doi-asserted-by":"crossref","unstructured":"Flautner, K., Kim, N.S., Martin, S., Blaauw, D., Mudge, T.N.: Drowsy Caches: Simple Techniques for Reducing Leakage Power. In: ISCA. International Symposium on Computer Architecture, pp. 148\u2013157 (2002)","DOI":"10.1145\/545214.545232"},{"key":"11_CR15","first-page":"52","volume-title":"IEEE Symposium on Security and Privicy","author":"W.M. Hu","year":"1992","unstructured":"Hu, W.M.: Lattice Scheduling and Covert Channels. In: IEEE Symposium on Security and Privicy, pp. 52\u201361. IEEE Computer Society Press, Los Alamitos (1992)"},{"key":"11_CR16","unstructured":"Intel Corporation. Intel i960 Jx Processor Documentation, http:\/\/www.intel.com\/design\/i960\/documentation\/"},{"key":"11_CR17","unstructured":"Intel Corporation. Intel XScale Processor Documentation, http:\/\/www.intel.com\/design\/intelxscale\/"},{"issue":"2-3","key":"11_CR18","doi-asserted-by":"crossref","first-page":"141","DOI":"10.3233\/JCS-2000-82-304","volume":"8","author":"J. Kelsey","year":"2000","unstructured":"Kelsey, J., Schneier, B., Wagner, D., Hall, C.: Side Channel Cryptanalysis of Product Ciphers. Journal of Computer Security\u00a08(2-3), 141\u2013158 (2000)","journal-title":"Journal of Computer Security"},{"key":"11_CR19","unstructured":"Kim, N.S., Flautner, K., Blaauw, D., Mudge, T.N.: Drowsy Instruction Caches: Leakage Power Reduction using Dynamic Voltage Scaling and Cache Sub-bank Prediction. In: MICRO. International Symposium on Microarchitecture, pp. 219\u2013230 (2002)"},{"key":"11_CR20","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"104","DOI":"10.1007\/3-540-68697-5_9","volume-title":"CRYPTO 1996","author":"P.C. Kocher","year":"1996","unstructured":"Kocher, P.C.: Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems. In: Koblitz, N. (ed.) CRYPTO 1996. LNCS, vol.\u00a01109, pp. 104\u2013113. Springer, Heidelberg (1996)"},{"key":"11_CR21","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"388","DOI":"10.1007\/3-540-48405-1_25","volume-title":"CRYPTO 1999","author":"P.C. Kocher","year":"1999","unstructured":"Kocher, P.C., Jaffe, J., Jun, B.: Differential Power Analysis. In: Wiener, M.J. (ed.) CRYPTO 1999. LNCS, vol.\u00a01666, pp. 388\u2013397. Springer, Heidelberg (1999)"},{"key":"11_CR22","doi-asserted-by":"publisher","first-page":"519","DOI":"10.2307\/2007970","volume":"44","author":"P.L. Montgomery","year":"1985","unstructured":"Montgomery, P.L.: Modular Multiplication Without Trial Division. Mathematics of Computation\u00a044, 519\u2013521 (1985)","journal-title":"Mathematics of Computation"},{"key":"11_CR23","doi-asserted-by":"crossref","unstructured":"Osvik, D.A., Shamir, A., Tromer, E.: Cache attacks and Countermeasures: the Case of AES. Cryptology ePrint Archive, Report 2005\/271 (2005)","DOI":"10.1007\/11605805_1"},{"key":"11_CR24","doi-asserted-by":"crossref","unstructured":"Page, D.: Defending Against Cache Based Side-Channel Attacks. Information Security Technical Report, 8\u00a0(1), 30\u201344 (2003)","DOI":"10.1016\/S1363-4127(03)00104-3"},{"key":"11_CR25","unstructured":"Page, D.: Theoretical Use of Cache Memory as a Cryptanalytic Side-Channel. Cryptology ePrint Archive, Report 2002\/169 (2002)"},{"key":"11_CR26","volume-title":"Computer Architecture: A Quantitative Approach","author":"D.A. Patterson","year":"2006","unstructured":"Patterson, D.A., Hennessy, J.L.: Computer Architecture: A Quantitative Approach. Morgan Kaufmann, San Francisco (2006)"},{"key":"11_CR27","unstructured":"Percival, C.: Cache Missing For Fun And Profit, http:\/\/www.daemonology.net\/papers\/htt.pdf"},{"key":"11_CR28","first-page":"125","volume-title":"IEEE Symposium on Security and Privicy","author":"J.T. Trostle","year":"1998","unstructured":"Trostle, J.T.: Timing Attacks Against Trusted Path. In: IEEE Symposium on Security and Privicy, pp. 125\u2013134. IEEE Computer Society Press, Los Alamitos (1998)"},{"key":"11_CR29","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"62","DOI":"10.1007\/978-3-540-45238-6_6","volume-title":"CHES 2003","author":"Y. Tsunoo","year":"2003","unstructured":"Tsunoo, Y., Saito, T., Suzaki, T., Shigeri, M., Miyauchi, H.: Cryptanalysis of DES Implemented on Computers with Cache. In: D.Walter, C., Ko\u00e7, \u00c7.K., Paar, C. (eds.) CHES 2003. LNCS, vol.\u00a02779, pp. 62\u201376. Springer, Heidelberg (2003)"},{"key":"11_CR30","unstructured":"Tsunoo, Y., Tsujihara, E., Minematsu, K., Miyauchi, H.: Cryptanalysis of Block Ciphers Implemented on Computers with Cache. In: ISITA. International Symposium on Information Theory and Its Applications (2002)"},{"key":"11_CR31","doi-asserted-by":"crossref","unstructured":"Powell, M., Yang, S.-H., Falsafi, B., Roy, K., Vijaykumar, T.N.: Gated-Vdd: A circuit technique to reduce leakage in deep-submicron cache memories. In: Proc. of Int. Symp. Low Power Electronics and Design (2000)","DOI":"10.1145\/344166.344526"},{"key":"11_CR32","unstructured":"Li, Y., Parikh, D., Zhang, Y., Sankaranarayanan, K., Stan, M., Skadron, K.: State-Preserving vs. Non-State-Preserving Leakage Control in Caches. Design, Automation and Test in Europe (DATE), 22\u201329 (2004)"},{"key":"11_CR33","unstructured":"University of Michigan Sim-Panalyzer 2.0.3, http:\/\/www.eecs.umich.edu\/~panalyzer\/"},{"key":"11_CR34","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"144","DOI":"10.1007\/3-540-48059-5_14","volume-title":"Cryptographic Hardware and Embedded Systems","author":"T.S. Messerges","year":"1999","unstructured":"Messerges, T.S., Dabbish, E.A., Sloan, R.H.: Power Analysis Attacks of Modular Exponentiation in Smartcards. In: Ko\u00e7, \u00c7.K., Paar, C. (eds.) CHES 1999. LNCS, vol.\u00a01717, pp. 144\u2013157. Springer, Heidelberg (1999)"},{"issue":"3","key":"11_CR35","doi-asserted-by":"publisher","first-page":"26","DOI":"10.1109\/40.502403","volume":"16","author":"\u00c7.K. Ko\u00e7","year":"1996","unstructured":"Ko\u00e7, \u00c7.K., Acar, T., Kaliski, B.S.: Analyzing and Comparing Montgomery Multiplication Algorithms. IEEE Micro\u00a016(3), 26\u201333 (1996)","journal-title":"IEEE Micro"},{"key":"11_CR36","doi-asserted-by":"crossref","unstructured":"Burger, D., Austin, T.M.: The SimpleScalar Tool Set Version 2.0. Computer Architecture News (1997)","DOI":"10.1145\/268806.268810"},{"key":"11_CR37","unstructured":"Zhang, Y., Parikh, D., Sankaranarayanan, K., Skadron, K., Stan, M.: Hotleakage: A temperature-aware model of subthreshold and gate leakage for architects, http:\/\/lava.cs.virginia.edu\/HotLeakage\/"}],"container-title":["Lecture Notes in Computer Science","Cryptography and Coding"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-77272-9_11.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,23]],"date-time":"2025-01-23T08:14:45Z","timestamp":1737620085000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-77272-9_11"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["9783540772712"],"references-count":37,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-77272-9_11","relation":{},"subject":[]}}