{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T13:00:19Z","timestamp":1725627619121},"publisher-location":"Berlin, Heidelberg","reference-count":14,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540775591"},{"type":"electronic","value":"9783540775607"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/978-3-540-77560-7_11","type":"book-chapter","created":{"date-parts":[[2008,1,17]],"date-time":"2008-01-17T01:13:02Z","timestamp":1200532382000},"page":"147-160","source":"Crossref","is-referenced-by-count":9,"title":["Compilation Strategies for Reducing Code Size on a VLIW Processor with Variable Length Instructions"],"prefix":"10.1007","author":[{"given":"Todd T.","family":"Hahn","sequence":"first","affiliation":[]},{"given":"Eric","family":"Stotzer","sequence":"additional","affiliation":[]},{"given":"Dineel","family":"Sule","sequence":"additional","affiliation":[]},{"given":"Mike","family":"Asal","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"issue":"1-2","key":"11_CR1","doi-asserted-by":"publisher","first-page":"9","DOI":"10.1007\/BF01205181","volume":"7","author":"B.R. Rau","year":"1993","unstructured":"Rau, B.R., Fisher, J.A.: Instruction-level parallel processing: History, overview, and perspective. Journal of Supercomputing\u00a07(1-2), 9\u201350 (1993)","journal-title":"Journal of Supercomputing"},{"key":"11_CR2","doi-asserted-by":"publisher","first-page":"201","DOI":"10.1109\/MICRO.1996.566462","volume-title":"MICRO 29: Proceedings of the 29th annual ACM\/IEEE International Symposium on Microarchitecture","author":"T.M. Conte","year":"1996","unstructured":"Conte, T.M., Banerjia, S., Larin, S.Y., Menezes, K.N., Sathaye, S.W.: Instruction fetch mechanisms for VLIW architectures with compressed encodings. In: MICRO 29: Proceedings of the 29th annual ACM\/IEEE International Symposium on Microarchitecture, pp. 201\u2013211. IEEE Computer Society, Washington, DC, USA (1996)"},{"key":"11_CR3","first-page":"76","volume-title":"DATE 2004","author":"C.H. Lin","year":"2004","unstructured":"Lin, C.H., Xie, Y., Wolf, W.: LZW-based code compression for VLIW embedded systems. In: DATE 2004. Proceedings of the Conference on Design, Automation and Test in Europe, vol.\u00a03, pp. 76\u201381. IEEE Computer Society Press, Washington, DC, USA (2004)"},{"key":"11_CR4","doi-asserted-by":"publisher","first-page":"95","DOI":"10.1145\/951710.951725","volume-title":"CASES 2003","author":"M. Ros","year":"2003","unstructured":"Ros, M., Sutton, P.: Compiler optimization and ordering effects on VLIW code compression. In: CASES 2003. Proceedings of the 2003 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, pp. 95\u2013103. ACM Press, New York (2003)"},{"issue":"4","key":"11_CR5","doi-asserted-by":"publisher","first-page":"752","DOI":"10.1145\/362652.362658","volume":"5","author":"S. Aditya","year":"2000","unstructured":"Aditya, S., Mahlke, S.A., Rau, B.R.: Code size minimization and retargetable assembly for custom EPIC and VLIW instruction formats. ACM Transactions on Design Automation of Electronic Systems\u00a05(4), 752\u2013773 (2000)","journal-title":"ACM Transactions on Design Automation of Electronic Systems"},{"key":"11_CR6","unstructured":"ARM Limited: ARM7TDMI (Rev. 4) Technical Reference Manual (2001)"},{"key":"11_CR7","unstructured":"Phelan, R.: Improving ARM code density and performance. Technical report, ARM Limited (2003)"},{"key":"11_CR8","unstructured":"MIPS Technologies: MIPS32 Architecture for Programmers, Vol. IV-a: The MIPS16 Application Specific Extension to the MIPS32 Architecture (2001)"},{"key":"11_CR9","unstructured":"Texas Instruments: TMS320C64x\/C64x+ DSP CPU and Instruction Set Reference Guide, Literature number spru732c (2006)"},{"key":"11_CR10","doi-asserted-by":"publisher","first-page":"28","DOI":"10.1145\/314403.314427","volume-title":"LCTES 1999","author":"E. Stotzer","year":"1999","unstructured":"Stotzer, E., Leiss, E.: Modulo scheduling for the TMS320C6x VLIW DSP architecture. In: LCTES 1999. Proceedings of the ACM SIGPLAN 1999 Workshop on Languages, Compilers, and Tools for Embedded Systems, pp. 28\u201334. ACM Press, New York (1999)"},{"issue":"3","key":"11_CR11","doi-asserted-by":"publisher","first-page":"428","DOI":"10.1145\/177492.177575","volume":"16","author":"P. Briggs","year":"1994","unstructured":"Briggs, P., Cooper, K.D., Torczon, L.: Improvements to graph coloring register allocation. ACM Transactions on Programming Languages and Systems\u00a016(3), 428\u2013455 (1994)","journal-title":"ACM Transactions on Programming Languages and Systems"},{"key":"11_CR12","unstructured":"Davis, A.L., Humphreys, J.F., Tatge, R.E.: Maintaining code consistency among plural instruction sets via function naming convention, U.S. Patent 6,002,876 (1999)"},{"key":"11_CR13","unstructured":"Texas Instruments: TMS320C6000 Optimizing Compiler User\u2019s Guide, Literature number spru187 (2000)"},{"key":"11_CR14","doi-asserted-by":"publisher","first-page":"138","DOI":"10.1109\/MICRO.2001.991113","volume-title":"MICRO 34: Proceedings of the 34th annual ACM\/IEEE international symposium on Microarchitecture","author":"M.C. Merten","year":"2001","unstructured":"Merten, M.C., Hwu, W.W.: Modulo schedule buffers. In: MICRO 34: Proceedings of the 34th annual ACM\/IEEE international symposium on Microarchitecture, pp. 138\u2013149. IEEE Computer Society, Washington, DC, USA (2001)"}],"container-title":["Lecture Notes in Computer Science","High Performance Embedded Architectures and Compilers"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-77560-7_11.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T06:44:22Z","timestamp":1619505862000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-77560-7_11"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["9783540775591","9783540775607"],"references-count":14,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-77560-7_11","relation":{},"subject":[]}}