{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T03:15:41Z","timestamp":1725506141552},"publisher-location":"Berlin, Heidelberg","reference-count":19,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540781523"},{"type":"electronic","value":"9783540781530"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/978-3-540-78153-0_14","type":"book-chapter","created":{"date-parts":[[2008,2,14]],"date-time":"2008-02-14T06:40:51Z","timestamp":1202971251000},"page":"173-187","source":"Crossref","is-referenced-by-count":1,"title":["Soft Real-Time Scheduling on SMT Processors with Explicit Resource Allocation"],"prefix":"10.1007","author":[{"given":"Carlos","family":"Boneti","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Francisco J.","family":"Cazorla","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Roberto","family":"Gioiosa","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mateo","family":"Valero","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"14_CR1","doi-asserted-by":"crossref","unstructured":"Cazorla, F.J., et al.: Improving memory latency aware fetch policies for SMT processors. In: Proceedings of the 5th ISHPC (October 2003)","DOI":"10.1007\/978-3-540-39707-6_6"},{"issue":"4","key":"14_CR2","first-page":"24","volume":"24","author":"F.J. Cazorla","year":"2004","unstructured":"Cazorla, F.J., et al.: Qos for high-performance SMT processors in embedded systems. IEEE micro. Special Issue on Embedded Systems\u00a024(4), 24\u201331 (2004)","journal-title":"IEEE micro. Special Issue on Embedded Systems"},{"key":"14_CR3","doi-asserted-by":"crossref","unstructured":"Cazorla, F.J., et al.: Architectural support for real-time task scheduling in SMT processors. CASES-2005, 166\u2013176 (2005)","DOI":"10.1145\/1086297.1086320"},{"issue":"7","key":"14_CR4","doi-asserted-by":"publisher","first-page":"785","DOI":"10.1109\/TC.2006.108","volume":"55","author":"F.J. Cazorla","year":"2006","unstructured":"Cazorla, F.J., et al.: Predictable performance in SMT processors: synergy between the OS and SMTs. IEEE Transactions on Computers\u00a055(7), 785\u2013799 (2006)","journal-title":"IEEE Transactions on Computers"},{"issue":"12","key":"14_CR5","doi-asserted-by":"publisher","first-page":"1497","DOI":"10.1109\/32.58762","volume":"15","author":"M.L. Dertouzos","year":"1989","unstructured":"Dertouzos, M.L., Mok, A.K.: Multiprocessor online scheduling of hard-real-time tasks. IEEE Trans. Softw. Eng.\u00a015(12), 1497\u20131506 (1989)","journal-title":"IEEE Trans. Softw. Eng."},{"key":"14_CR6","doi-asserted-by":"crossref","unstructured":"El-Haj-Mahmoud, A., et al.: Virtual multiprocessor: an analyzable, high-performance architecture for real-time computing. In: CASES (2005)","DOI":"10.1145\/1086297.1086326"},{"key":"14_CR7","unstructured":"Goossens, J., Macq, C.: Limitation of the hyper-period in real-time periodic task set generation. In: Teknea (ed.) Proccedings of RTS 2001, Paris, France, pp. 133\u2013148 (2001)"},{"issue":"2","key":"14_CR8","doi-asserted-by":"publisher","first-page":"416","DOI":"10.1137\/0117039","volume":"17","author":"R.L. Graham","year":"1969","unstructured":"Graham, R.L.: Bounds on multiprocessing timing anomalies. SIAM Journal on Applied Mathematics\u00a017(2), 416\u2013429 (1969)","journal-title":"SIAM Journal on Applied Mathematics"},{"key":"14_CR9","unstructured":"Goossens, J., Richard, P.: Overview of real-time scheduling problem. In: Proceedings of the ninth international conference on project management and scheduling, Nancy France (April 2004)"},{"key":"14_CR10","doi-asserted-by":"crossref","unstructured":"Jain, R., Hughes, C.J., Adve, S.V.: Soft real-time scheduling on simultaneous multithreaded processors. In: Proceedings of RTSS 2002 (2002)","DOI":"10.1109\/REAL.2002.1181569"},{"key":"14_CR11","unstructured":"Lee, A., Potkonjak1, M., Mangione-Smith, W.H.: Mediabench: A tool for evaluating and synthesizing multimedia and communications systems. In: 30th MICRO, pp. 330\u2013335 (1997)"},{"issue":"1","key":"14_CR12","doi-asserted-by":"publisher","first-page":"46","DOI":"10.1145\/321738.321743","volume":"20","author":"C.L. Liu","year":"1973","unstructured":"Liu, C.L., Layland, J.W.: Scheduling algorithms for multiprogramming in a hard-real-time environment. J. ACM\u00a020(1), 46\u201361 (1973)","journal-title":"J. ACM"},{"key":"14_CR13","unstructured":"Marr, D.T., et al.: Hyper-threading technology architecture and microarchitecture. Intel Technology Journal\u00a06(1) (February 2002)"},{"issue":"1","key":"14_CR14","doi-asserted-by":"publisher","first-page":"127","DOI":"10.1287\/opre.26.1.127","volume":"26","author":"S.K. Dhall","year":"1978","unstructured":"Dhall, S.K., Liu, C.L.: On a Real-Time Scheduling Problem. Operations Research\u00a026(1), 127\u2013140 (1978)","journal-title":"Operations Research"},{"key":"14_CR15","unstructured":"Lo, S.-W., Lam, K.-Y., Kuo, T.-W.: Real-Time Task Scheduling for SMT Systems. In: RTCSA 2005, pp. 5\u201310 (2005)"},{"issue":"11","key":"14_CR16","doi-asserted-by":"publisher","first-page":"234","DOI":"10.1145\/356989.357011","volume":"35","author":"A. Snavely","year":"2000","unstructured":"Snavely, A., Tullsen, D.M.: Symbiotic jobscheduling for a simultaneous mutlithreading processor. SIGPLAN Not.\u00a035(11), 234\u2013244 (2000)","journal-title":"SIGPLAN Not."},{"key":"14_CR17","doi-asserted-by":"crossref","unstructured":"Snavely, A., Tullsen, D.M., Voelker, G.: Symbiotic jobscheduling with priorities for a simultaneous multithreading processor. In: Sigmetrics 2002 (2002)","DOI":"10.1145\/511334.511343"},{"issue":"2","key":"14_CR18","doi-asserted-by":"publisher","first-page":"93","DOI":"10.1016\/S0020-0190(02)00231-4","volume":"84","author":"A. Srinivasan","year":"2002","unstructured":"Srinivasan, A., Baruah, S.: Deadline-based scheduling of periodic task systems on multiprocessors. Inf. Process. Lett.\u00a084(2), 93\u201398 (2002)","journal-title":"Inf. Process. Lett."},{"issue":"2","key":"14_CR19","doi-asserted-by":"publisher","first-page":"191","DOI":"10.1145\/232974.232993","volume":"24","author":"D.M. Tullsen","year":"1996","unstructured":"Tullsen, D.M., et al.: Exploiting choice: instruction fetch and issue on an implementable simultaneous multithreading processor. SIGARCH Comput. Archit. News\u00a024(2), 191\u2013202 (1996)","journal-title":"SIGARCH Comput. Archit. News"}],"container-title":["Lecture Notes in Computer Science","Architecture of Computing Systems \u2013 ARCS 2008"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-78153-0_14.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T10:59:43Z","timestamp":1619521183000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-78153-0_14"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["9783540781523","9783540781530"],"references-count":19,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-78153-0_14","relation":{},"subject":[]}}