{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T06:53:55Z","timestamp":1725519235879},"publisher-location":"Berlin, Heidelberg","reference-count":11,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540858560"},{"type":"electronic","value":"9783540858577"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/978-3-540-85857-7_21","type":"book-chapter","created":{"date-parts":[[2008,9,27]],"date-time":"2008-09-27T03:23:02Z","timestamp":1222485782000},"page":"237-248","source":"Crossref","is-referenced-by-count":3,"title":["Proposal for LDPC Code Design System Using Multi-Objective Optimization and FPGA-Based Emulation"],"prefix":"10.1007","author":[{"given":"Yukari","family":"Ishida","sequence":"first","affiliation":[]},{"given":"Hirotaka","family":"Nosato","sequence":"additional","affiliation":[]},{"given":"Eiichi","family":"Takahashi","sequence":"additional","affiliation":[]},{"given":"Masahiro","family":"Murakawa","sequence":"additional","affiliation":[]},{"given":"Isamu","family":"Kajitani","sequence":"additional","affiliation":[]},{"given":"Tatsumi","family":"Furuya","sequence":"additional","affiliation":[]},{"given":"Tetsuya","family":"Higuchi","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"21_CR1","doi-asserted-by":"crossref","DOI":"10.7551\/mitpress\/4347.001.0001","volume-title":"Low-Density Parity-Check Codes","author":"R. Gallager","year":"1963","unstructured":"Gallager, R.: Low-Density Parity-Check Codes. MIT Press, Cambridge (1963)"},{"issue":"18","key":"21_CR2","doi-asserted-by":"publisher","first-page":"1645","DOI":"10.1049\/el:19961141","volume":"32","author":"D. Mackay","year":"1996","unstructured":"Mackay, D., Neal, R.M.: Near shannon limit performance of low density parity check codes. Electron Lett.\u00a032(18), 1645\u20131646 (1996)","journal-title":"Electron Lett."},{"key":"21_CR3","unstructured":"Lin, S., Costello, J.D.: Error Control Coding, 2nd edn. PEARSON Prentice Hall (2004)"},{"key":"21_CR4","unstructured":"Shannon, C.E., Weaver, W.: The Mathematical Theory of Communication. University of Illinois Press (1963)"},{"key":"21_CR5","unstructured":"Seki, K., Itabashi, T., Higuchi, T., Kasai, Y., Takahashi, E.: Performance evaluation of low latency LDPC code. Technical report, IEEE P802.3an July 2004 Plenary (2004)"},{"issue":"3","key":"21_CR6","doi-asserted-by":"crossref","first-page":"269","DOI":"10.1007\/BF03325101","volume":"1","author":"C.C. Coello","year":"1999","unstructured":"Coello, C.C.: A comprehensible survey of evolutionary -based multi-objective optimization techniques. Knowledge and Information Systems\u00a01(3), 269\u2013308 (1999)","journal-title":"Knowledge and Information Systems"},{"key":"21_CR7","volume-title":"Genetic Algorithms in Search, Optimization, and Machine Learning","author":"D.E. Goldberg","year":"1989","unstructured":"Goldberg, D.E.: Genetic Algorithms in Search, Optimization, and Machine Learning. Addison-Wesley, Reading (1989)"},{"key":"21_CR8","unstructured":"Cant\u00fa-Paz, E.: A summary of research on parallel genetic algorithms. IlliGAL Report 97003, University of Illinois (1997)"},{"key":"21_CR9","unstructured":"Forum, M.P.I.: MPI-2: Extensions to the message-passing interface (2003), http:\/\/www.mpi-forum.org"},{"key":"21_CR10","volume-title":"Parallel Computer Archtecture, A Hardware\/Software Approach","author":"D.E. Culler","year":"1999","unstructured":"Culler, D.E., Singh, J.P., Gupta, A.: Parallel Computer Archtecture, A Hardware\/Software Approach. Morgan Kaufmann, San Francisco (1999)"},{"key":"21_CR11","first-page":"493","volume":"3","author":"D.E. Goldberg","year":"1989","unstructured":"Goldberg, D.E., Korb, B., Deb, K.: Messy genetic algorithms: Motivation, analysis, and first results. Complex Systems\u00a03, 493\u2013530 (1989)","journal-title":"Complex Systems"}],"container-title":["Lecture Notes in Computer Science","Evolvable Systems: From Biology to Hardware"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-85857-7_21.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T11:52:08Z","timestamp":1619524328000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-85857-7_21"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["9783540858560","9783540858577"],"references-count":11,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-85857-7_21","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[]}}