{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T12:10:40Z","timestamp":1725538240502},"publisher-location":"Berlin, Heidelberg","reference-count":15,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783642041549"},{"type":"electronic","value":"9783642041556"}],"license":[{"start":{"date-parts":[[2009,1,1]],"date-time":"2009-01-01T00:00:00Z","timestamp":1230768000000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009]]},"DOI":"10.1007\/978-3-642-04155-6_16","type":"book-chapter","created":{"date-parts":[[2009,9,29]],"date-time":"2009-09-29T12:04:42Z","timestamp":1254225882000},"page":"215-227","source":"Crossref","is-referenced-by-count":0,"title":["Password Cracking Using Sony Playstations"],"prefix":"10.1007","author":[{"given":"Hugo","family":"Kleinhans","sequence":"first","affiliation":[]},{"given":"Jonathan","family":"Butts","sequence":"additional","affiliation":[]},{"given":"Sujeet","family":"Shenoi","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"16_CR1","unstructured":"E. Altman, P. Capek, M. Gschwind, H. Hofstee, J. Kahle, R. Nair, S. Sathaye, J. Wellman, M. Suzuoki and T. Yamazaki, U.S. Patent 6779049 \u2013 Symmetric multi-processing system with attached processing units being able to access a shared memory without being structurally configured with an address translation mechanism, U.S. Patent and Trademark Office, Alexandria, Virginia, August 17, 2004."},{"key":"16_CR2","unstructured":"N. Blachford, Cell architecture explained (Version 2) (www.blach ford.info\/computer\/Cell\/Cell0_v2.html), 2005."},{"key":"16_CR3","unstructured":"N. Breese, Crackstation \u2013 Optimized cryptography on the PlayStation 3, Security-Assessment.com, Auckland, New Zealand (www.se curity-assessment.com\/files\/presentations\/crackstation-njb-bheu08 -v2.pdf), 2007."},{"key":"16_CR4","unstructured":"M. Gschwind, The cell architecture, IBM Corporation, Armonk, New York (domino.research.ibm.com\/comm\/research.nsf\/pages\/r.a rch.innovation.html), 2007."},{"key":"16_CR5","unstructured":"IBM Corporation, Cell Broadband Engine Architecture (Version 1.02), Armonk, New York, 2007."},{"key":"16_CR6","unstructured":"IBM Corporation, IBM Software Development Kit for Multicore Acceleration (Version 3), Armonk, New York, 2007."},{"key":"16_CR7","unstructured":"E. Nakashima, In child porn case, a digital dilemma, The Washington Post, January 16, 2008."},{"key":"16_CR8","doi-asserted-by":"crossref","unstructured":"R. Rivest, RFC 1321: The MD5 Message-Digest Algorithm, Laboratory for Computer Science, Massachusetts Institute of Technology, Cambridge, Massachusetts (www.ietf.org\/rfc\/rfc1321.txt), 1992.","DOI":"10.17487\/rfc1321"},{"key":"16_CR9","unstructured":"A. Shimpi, Understanding the cell microprocessor, AnandTech, Minden, Nevada (www.anandtech.com\/cpuchipsets\/showdoc.aspx? i=2379), 2005."},{"key":"16_CR10","unstructured":"J. Stokes, SIMD architecture, Ars Technica (arstechnica.com\/artic les\/paedia\/cpu\/simd.ars), 2000."},{"key":"16_CR11","unstructured":"J. Stokes, Introducing the IBM\/Sony\/Toshiba cell processor Part I: The SIMD processing units, Ars Technica (arstechnica .com\/articles\/paedia\/cpu\/cell-1.ars), 2005."},{"key":"16_CR12","unstructured":"M. Suzuoki, T. Yamazaki, C. Johns, S. Asano, A. Kunimatsu and Y. Watanabe, U.S. Patent 6809734 \u2013 Resource dedication system and method for a computer architecture for broadband networks, U.S. Patent and Trademark Office, Alexandria, Virginia, October 26, 2004."},{"key":"16_CR13","volume-title":"Modern Cryptanalysis: Techniques for Advanced Code Breaking","author":"C. Swenson","year":"2008","unstructured":"C. Swenson, Modern Cryptanalysis: Techniques for Advanced Code Breaking, Wiley, Indianapolis, Indiana, 2008."},{"key":"16_CR14","unstructured":"T. Tian and C. Shih, Software techniques for shared-cache multi-core systems, Intel Corporation, Santa Clara, California (software.intel.com\/en-us\/articles\/software-techniques-for-shared-c ache-multi-core-systems), 2007."},{"key":"16_CR15","unstructured":"D. Wang, The cell microprocessor, Real World Technologies, Colton, California (www.realworldtech.com\/page.cfm?ArticleID=RWT021 005084318), 2005."}],"container-title":["IFIP Advances in Information and Communication Technology","Advances in Digital Forensics V"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-04155-6_16","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,22]],"date-time":"2019-05-22T22:38:27Z","timestamp":1558564707000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-04155-6_16"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009]]},"ISBN":["9783642041549","9783642041556"],"references-count":15,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-04155-6_16","relation":{},"ISSN":["1868-4238","1868-422X"],"issn-type":[{"type":"print","value":"1868-4238"},{"type":"electronic","value":"1868-422X"}],"subject":[],"published":{"date-parts":[[2009]]}}}