{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T14:03:07Z","timestamp":1725544987046},"publisher-location":"Berlin, Heidelberg","reference-count":42,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783642113888"},{"type":"electronic","value":"9783642113895"}],"license":[{"start":{"date-parts":[[2010,1,1]],"date-time":"2010-01-01T00:00:00Z","timestamp":1262304000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010]]},"DOI":"10.1007\/978-3-642-11389-5_6","type":"book-chapter","created":{"date-parts":[[2010,2,12]],"date-time":"2010-02-12T07:25:58Z","timestamp":1265959558000},"page":"101-121","source":"Crossref","is-referenced-by-count":3,"title":["An Analysis of Secure Processor Architectures"],"prefix":"10.1007","author":[{"given":"Siddhartha","family":"Chhabra","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yan","family":"Solihin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Reshma","family":"Lal","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Matthew","family":"Hoekstra","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"6_CR1","unstructured":"Kumar, A.: Discovering Passwords in Memory (2004), \n                    \n                      http:\/\/www.infosec-writers.com\/text_resources\/"},{"key":"6_CR2","unstructured":"americanxboxmodchips.com, \n                    \n                      http:\/\/www.americanxboxmodchips.com\/"},{"key":"6_CR3","unstructured":"http:\/\/www.modchip.com\n                    \n                    \n                   (2005)"},{"key":"6_CR4","unstructured":"mod-chip.com, \n                    \n                      http:\/\/www.mod-chip.com\/"},{"key":"6_CR5","unstructured":"modchipoutlet.com, \n                    \n                      http:\/\/www.modchipoutlet.com\/"},{"key":"6_CR6","unstructured":"modchipstore.com, \n                    \n                      http:\/\/www.modchipstore.com\/"},{"key":"6_CR7","unstructured":"wii-modchips.com, \n                    \n                      http:\/\/www.wii-modchips.com\/"},{"key":"6_CR8","unstructured":"xbox-modchips.com, \n                    \n                      http:\/\/www.xbox-modchips.com\/"},{"key":"6_CR9","unstructured":"xbox-scene.com, \n                    \n                      http:\/\/www.xbox-scene.com\/"},{"key":"6_CR10","unstructured":"xboxhackz.com, \n                    \n                      http:\/\/www.xboxhackz.com\/"},{"key":"6_CR11","unstructured":"Gassend, B., Suh, G., Clarke, D., Dijk, M., Devadas, S.: Caches and Hash Trees for Efficient Memory Integrity Verification. In: Proc. of the 9th International Symposium on High Performance Computer Architecture (2003)"},{"key":"6_CR12","doi-asserted-by":"crossref","unstructured":"Gilmont, T., Legat, J.D., Quisquater, J.J.: Enhancing the Security in the Memory Management Unit. In: Proc. of the 25th EuroMicro Conference (1999)","DOI":"10.1109\/EURMIC.1999.794507"},{"key":"6_CR13","unstructured":"Lie, D., Mitchell, J., Thekkath, C., Horowitz, M.: Specifying and Verifying Hardware for Tamper-Resistant Software. In: Proc. of the 2003 IEEE Symposium on Security and Privacy (2003)"},{"key":"6_CR14","doi-asserted-by":"crossref","unstructured":"Lie, D., Thekkath, C., Mitchell, M., Lincoln, P., Boneh, D., Mitchell, J., Horowitz, M.: Architectural Support for Copy and Tamper Resistant Software. In: Proc. of the 9th International Conference on Architectural Support for Programming Languages and Operating Systems (2000)","DOI":"10.21236\/ADA419599"},{"key":"6_CR15","doi-asserted-by":"crossref","unstructured":"Rogers, B., Solihin, Y., Prvulovic, M.: Efficient Data Protection for Distributed Shared Memory Multiprocessors. In: Proc. of the 15th International Conference on Parallel Architectures and Compilation Techniques (2006)","DOI":"10.1145\/1152154.1152170"},{"key":"6_CR16","unstructured":"Shi, W., Lee, H.H., Ghosh, M., Lu, C.: Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems. In: Proc. of the 13th International Conference on Parallel Architectures and Compilation Techniques (2004)"},{"key":"6_CR17","doi-asserted-by":"crossref","unstructured":"Shi, W., Lee, H.H., Ghosh, M., Lu, C., Boldyreva, A.: High Efficiency Counter Mode Security Architecture via Prediction and Precomputation. In: Proc. of the 32nd International Symposium on Computer Architecture (2005)","DOI":"10.1145\/1080695.1069972"},{"key":"6_CR18","doi-asserted-by":"crossref","unstructured":"Shi, W., Lee, H.H., Lu, C., Ghosh, M.: Towards the Issues in Architectural Support for Protection of Software Execution. In: Proc. of the Workshop on Architectural Support for Security and Anti-virus (2004)","DOI":"10.1145\/1055626.1055629"},{"key":"6_CR19","unstructured":"Suh, G., Clarke, D., Gassend, B., van Dijk, M., Devadas, S.: AEGIS: Architecture for Tamper-Evident and Tamper-Resistant Processing. In: Proc. of the 17th International Conference on Supercomputing (2003)"},{"key":"6_CR20","unstructured":"Suh, G., Clarke, D., Gassend, B., van Dijk, M., Devadas, S.: Efficient Memory Integrity Verification and Encryption for Secure Processor. In: Proc. of the 36th Annual International Symposium on Microarchitecture (2003)"},{"key":"6_CR21","doi-asserted-by":"crossref","unstructured":"Yan, C., Rogers, B., Englender, D., Solihin, Y., Prvulovic, M.: Improving Cost, Performance, and Security of Memory Encryption and Authentication. In: Proc. of the International Symposium on Computer Architecture (2006)","DOI":"10.1145\/1150019.1136502"},{"key":"6_CR22","unstructured":"Yang, J., Zhang, Y., Gao, L.: Fast Secure Processor for Inhibiting Software Piracy and Tampering. In: Proc. of the 36th Annual International Symposium on Microarchitecture (2003)"},{"key":"6_CR23","unstructured":"Zhang, Y., Gao, L., Yang, J., Zhang, X., Gupta, R.: SENSS: Security Enhancement to Symmetric Shared Memory Multiprocessors. In: Proc. of the 11th International Symposium on High-Performance Computer Architecture (2005)"},{"key":"6_CR24","unstructured":"IBM: IBM Extends Enhanced Data Security to Consumer Electronics Products (April 2006), \n                    \n                      http:\/\/domino.research.ibm.com\/comm\/pr.nsf\/pages\/news.20060410_security.html"},{"key":"6_CR25","unstructured":"Maxim\/Dallas Semiconductor: DS5002FP Secure Microprocessor Chip, (2007), \n                    \n                      http:\/\/www.maxim-ic.com\/quick_view2.cfm\/qv_pk\/2949\n                    \n                    \n                   (last modification)"},{"key":"6_CR26","unstructured":"Intel: Intel Trusted Execution Technology (May 2006), \n                    \n                      http:\/\/www.intel.com\/technology\/security\/"},{"key":"6_CR27","doi-asserted-by":"crossref","unstructured":"Rogers, B., Chhabra, S., Solihin, Y., Prvulovic, M.: Using Address Independent Seed Encryption and Bonsai Merkle Trees to Make Secure Processors OS- and Performance-Friendly. In: Proc. of the 36th Annual International Symposium on Microarchitecture (2007)","DOI":"10.1109\/MICRO.2007.16"},{"key":"6_CR28","volume-title":"Hacking the Xbox: An Introduction to Reverse Engineering","author":"A. Huang","year":"2003","unstructured":"Huang, A.: Hacking the Xbox: An Introduction to Reverse Engineering. No Starch Press, San Francisco (2003)"},{"issue":"10","key":"6_CR29","doi-asserted-by":"crossref","first-page":"103","DOI":"10.1109\/MC.2002.1039525","volume":"35","author":"A.B. Huang","year":"2002","unstructured":"Huang, A.B.: The Trusted PC: Skin-Deep Security. IEEE Computer\u00a035(10), 103\u2013105 (2002)","journal-title":"IEEE Computer"},{"key":"6_CR30","unstructured":"FIPS Publication 197: Specification for the Advanced Encryption Standard (AES). National Institute of Standards and Technology, Federal Information Processing Standards (2001)"},{"key":"6_CR31","unstructured":"FIPS Publication 180-1: Secure Hash Standard. National Institute of Standards and Technology, Federal Information Processing Standards (1995)"},{"key":"6_CR32","unstructured":"Renau, J., et al.: SESC (2004), \n                    \n                      http:\/\/sesc.sourceforge.net"},{"key":"6_CR33","doi-asserted-by":"crossref","unstructured":"Krawczyk, H., Bellare, M., Caneti, R.: HMAC: Keyed-hashing for message authentication (1997), \n                    \n                      http:\/\/www.ietf.org\/rfc\/rfc2104.txt","DOI":"10.17487\/rfc2104"},{"key":"6_CR34","doi-asserted-by":"crossref","unstructured":"Kgil, T., Falk, L., Mudge, T.: ChipLock: Support for Secure Microarchitectures. In: Proc. of the Workshop on Architectural Support for Security and Anti-Virus (October 2004)","DOI":"10.1145\/1055626.1055644"},{"key":"6_CR35","unstructured":"Standard Performance Evaluation Corporation (2004), \n                    \n                      http:\/\/www.spec.org"},{"issue":"4","key":"6_CR36","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/1498690.1498691","volume":"5","author":"S. Chhabra","year":"2009","unstructured":"Chhabra, S., Rogers, B., Solihin, Y., Prvulovic, M.: Making secure processors os- and performance-friendly. ACM Transactions on Architecture and Code Optimization\u00a05(4), 1\u201335 (2009)","journal-title":"ACM Transactions on Architecture and Code Optimization"},{"key":"6_CR37","unstructured":"Bartholomew, D.: On Demand Computing \u2013 IT On Tap? (June 2005), \n                    \n                      http:\/\/www.industryweek.com\/ReadArticle.aspx?ArticleID=10303&SectionID=4"},{"key":"6_CR38","unstructured":"PandaLabs: Quarterly Report PandaLabs (2008), \n                    \n                      http:\/\/pandalabs.pandasecurity.com"},{"key":"6_CR39","doi-asserted-by":"crossref","unstructured":"Heasman, J.: Implementing and Detecting a PCI Rootkit (2006), \n                    \n                      http:\/\/www.ngssoftware.com\/research\/papers\/Implementingi_And_Detecting_A_PCI_Rootkit.pdf","DOI":"10.1016\/S1353-4858(06)70326-9"},{"key":"6_CR40","unstructured":"Arbaugh, W., Farber, D.J., Smith, J.M.: A Secure and Reliable Bootstrap Architecture. In: Proc. 1997 IEEE Symposium on Security and Privacy (1997)"},{"key":"6_CR41","unstructured":"TCG: TCG PC Client Specific Implementation Specification For Conventional BIOS (April 2006), \n                    \n                      https:\/\/www.trustedcomputinggroup.org\/sspecs\/PCClient\/TCG_PCClientImplementationforBIOS_1-20_100.pdf"},{"key":"6_CR42","unstructured":"ARM: ARM TrustZone (2004), \n                    \n                      http:\/\/www.arm.com\/products\/esd\/trustzone_home.html"}],"container-title":["Lecture Notes in Computer Science","Transactions on Computational Science VII"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-11389-5_6","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,19]],"date-time":"2019-05-19T17:38:56Z","timestamp":1558287536000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-11389-5_6"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010]]},"ISBN":["9783642113888","9783642113895"],"references-count":42,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-11389-5_6","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2010]]}}}