{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T17:16:59Z","timestamp":1725556619608},"publisher-location":"Berlin, Heidelberg","reference-count":20,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783642131356"},{"type":"electronic","value":"9783642131363"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010]]},"DOI":"10.1007\/978-3-642-13136-3_2","type":"book-chapter","created":{"date-parts":[[2010,5,25]],"date-time":"2010-05-25T18:20:16Z","timestamp":1274811616000},"page":"11-21","source":"Crossref","is-referenced-by-count":0,"title":["Single Thread Program Parallelism with Dataflow Abstracting Thread"],"prefix":"10.1007","author":[{"given":"Tianzhou","family":"Chen","sequence":"first","affiliation":[]},{"given":"Xingsheng","family":"Tang","sequence":"additional","affiliation":[]},{"given":"Jianliang","family":"Ma","sequence":"additional","affiliation":[]},{"given":"Lihan","family":"Ju","sequence":"additional","affiliation":[]},{"given":"Guanjun","family":"Jiang","sequence":"additional","affiliation":[]},{"given":"Qingsong","family":"Shi","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"2_CR1","doi-asserted-by":"crossref","unstructured":"Thies, W., Chandrasekhar, V., Amarasinghe, S.: A Practical Approach to Exploiting Coarse-Grained Pipeline Parallelism in C Programs. In: Proceedings of the 40th Annual IEEE\/ACM International Symposium on Microarchitecture (December 2007)","DOI":"10.1109\/MICRO.2007.38"},{"key":"2_CR2","doi-asserted-by":"crossref","unstructured":"Kaul, M., Vemuri, R., Govindarajan, S., Ouaiss, I.: An automated temporal partitioning and loop fission approach for FPGA based reconfigurable synthesis of DSP applications. In: Proceedings of the 36th ACM\/IEEE conference on Design automation (June 1999)","DOI":"10.1145\/309847.310010"},{"key":"2_CR3","doi-asserted-by":"crossref","unstructured":"Bondhugula, U., Ramanujam, J., Sadayappan, P.: Automatic mapping of nested loops to FPGAS. In: Proceedings of the 12th ACM SIGPLAN symposium on Principles and practice of parallel programming (March 2007)","DOI":"10.1145\/1229428.1229446"},{"key":"2_CR4","doi-asserted-by":"crossref","unstructured":"Ottoni, G., Rangan, R., Stoler, A., August, D.I.: Automatic Thread Extraction with Decoupled Software Pipelining. In: Proceedings of the 38th annual IEEE\/ACM International Symposium on Microarchitecture (November 2005)","DOI":"10.1109\/MICRO.2005.13"},{"key":"2_CR5","doi-asserted-by":"crossref","unstructured":"Bhowmik, Franklin, M.: A general compiler framework for speculative multithreading. In: Proceedings of the 14th ACM Symposium on Parallel Algorithms and Architectures, pp. 99\u2013108 (2002)","DOI":"10.1145\/564870.564885"},{"key":"2_CR6","doi-asserted-by":"crossref","unstructured":"Johnson, T.A., Eigenmann, R., Vijaykumar, T.N.: Min-cut program decomposition for thread-level speculation. In: Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation, pp. 59\u201370 (2004)","DOI":"10.1145\/996841.996851"},{"key":"2_CR7","doi-asserted-by":"crossref","unstructured":"Gordon, M.I., Thies, W., Amarasinghe, S.: Exploiting coarse-grained task, data, and pipeline parallelism in stream programs. ACM SIGPLAN Notices\u00a041(11) (November 2006)","DOI":"10.1145\/1168918.1168877"},{"key":"2_CR8","doi-asserted-by":"crossref","unstructured":"Kumar, S., Hughes, C.J., Nguyen, A.: Carbon: architectural support for fine-grained parallelism on chip multiprocessors. In: Proceedings of the 34th annual international symposium on Computer architecture (June 2007)","DOI":"10.1145\/1250662.1250683"},{"key":"2_CR9","doi-asserted-by":"crossref","unstructured":"Vachharajani, N., Iyer, M., Ashok, C., Vachharajani, M., August, D.I., Connors, D.: Chip multi-processor scalability for single-threaded applications. ACM SIGARCH Computer Architecture News\u00a033(4) (November 2005)","DOI":"10.1145\/1105734.1105741"},{"key":"2_CR10","doi-asserted-by":"crossref","unstructured":"Prabhu, M.K., Olukotun, K.: Exposing speculative thread parallelism in SPEC 2000. In: Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming (June 2005)","DOI":"10.1145\/1065944.1065964"},{"key":"2_CR11","doi-asserted-by":"crossref","unstructured":"Ottoni, G., August, D.: Global Multi-Threaded Instruction Scheduling. In: Proceedings of the 40th Annual IEEE\/ACM International Symposium on Microarchitecture (December 2007)","DOI":"10.1109\/MICRO.2007.32"},{"key":"2_CR12","doi-asserted-by":"crossref","unstructured":"Chen, J., Juang, P., Ko, K., Contreras, G., Penry, D., Rangan, R., Stoler, A., Peh, L.-S., Martonosi, M.: Hardware-modulated parallelism in chip multiprocessors. ACM SIGARCH Computer Architecture News\u00a033(4) (November 2005)","DOI":"10.1145\/1105734.1105742"},{"key":"2_CR13","doi-asserted-by":"crossref","unstructured":"Chu, M., Ravindran, R., Mahlke, S.: Data Access Partitioning for Fine-grain Parallelism on Multicore Architectures. In: Proceedings of the 40th Annual IEEE\/ACM International Symposium on Microarchitecture (December 2007)","DOI":"10.1109\/MICRO.2007.15"},{"key":"2_CR14","doi-asserted-by":"crossref","unstructured":"Hammond, L., Willey, M., Olukotun, K.: Data speculation support for a chip multiprocessor. ACM SIGOPS Operating Systems Review\u00a032(5) (December 1998)","DOI":"10.1145\/384265.291020"},{"key":"2_CR15","doi-asserted-by":"crossref","unstructured":"Sankaralingam, K., Nagarajan, R., Liu, H., Kim, C., Huh, J., Burger, D., Keckler, S.W., Moore, C.R.: Exploiting ILP, TLP, and DLP with the polymorphous TRIPS architecture. In: Proceedings of the 30th annual international symposium on Computer architecture (June 2003)","DOI":"10.1145\/859618.859667"},{"key":"2_CR16","doi-asserted-by":"crossref","unstructured":"Sampson, J., Gonzalez, R., Collard, J.-F., Jouppi, N.P., Schlansker, M., Calder, B.: Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers. In: Proceedings of the 39th Annual IEEE\/ACM International Symposium on Microarchitecture (December 2006)","DOI":"10.1109\/MICRO.2006.23"},{"key":"2_CR17","doi-asserted-by":"crossref","unstructured":"Rangan, R., Vachharajani, N., Vachharajani, M., August, D.I.: Decoupled Software Pipelining with the Synchronization Array. In: Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques (September 2004)","DOI":"10.1109\/PACT.2004.1342552"},{"issue":"3","key":"2_CR18","doi-asserted-by":"publisher","first-page":"319","DOI":"10.1145\/24039.24041","volume":"9","author":"J. Ferrante","year":"1987","unstructured":"Ferrante, J., Ottenstein, K.J., Warren, J.D.: The Program Dependence Graph and Its Use in Optimization. ACM Transactions on Programming Languages and Systems\u00a09(3), 319\u2013349 (1987)","journal-title":"ACM Transactions on Programming Languages and Systems"},{"key":"2_CR19","doi-asserted-by":"crossref","unstructured":"Colwell, R.P., Nix, R.P., O\u2019Donnell, J.J., Papworth, D.B., Rodman, P.K.: A VLIW architecture for a trace scheduling compiler. In: Proceedings of the 2nd International Conference on Architectural Support for Programming Languages and Operating Systems, April 1987, pp. 180\u2013192 (1987)","DOI":"10.1145\/36204.36201"},{"key":"2_CR20","doi-asserted-by":"crossref","unstructured":"Lam, M.S.: Software pipelining: An effective scheduling technique for VLIW machines. In: Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, June 1988, pp. 318\u2013328 (1988)","DOI":"10.1145\/53990.54022"}],"container-title":["Lecture Notes in Computer Science","Algorithms and Architectures for Parallel Processing"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-13136-3_2.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,11,23]],"date-time":"2020-11-23T22:01:59Z","timestamp":1606168919000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-13136-3_2"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010]]},"ISBN":["9783642131356","9783642131363"],"references-count":20,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-13136-3_2","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2010]]}}}