{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T12:13:10Z","timestamp":1763467990654,"version":"3.38.0"},"publisher-location":"Berlin, Heidelberg","reference-count":21,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783642157806"},{"type":"electronic","value":"9783642157813"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010]]},"DOI":"10.1007\/978-3-642-15781-3_7","type":"book-chapter","created":{"date-parts":[[2010,9,1]],"date-time":"2010-09-01T11:40:03Z","timestamp":1283341203000},"page":"75-86","source":"Crossref","is-referenced-by-count":8,"title":["Geometric Algorithms for Private-Cache Chip Multiprocessors"],"prefix":"10.1007","author":[{"given":"Deepak","family":"Ajwani","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Nodari","family":"Sitchinava","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Norbert","family":"Zeh","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"issue":"9","key":"7_CR1","doi-asserted-by":"publisher","first-page":"1116","DOI":"10.1145\/48529.48535","volume":"31","author":"A. Aggarwal","year":"1988","unstructured":"Aggarwal, A., Vitter, J.S.: The input\/output complexity of sorting and related problems. Communications of the ACM\u00a031(9), 1116\u20131127 (1988)","journal-title":"Communications of the ACM"},{"key":"7_CR2","doi-asserted-by":"crossref","unstructured":"Arge, L., Goodrich, M.T., Nelson, M.J., Sitchinava, N.: Fundamental parallel algorithms for private-cache chip multiprocessors. In: SPAA, pp. 197\u2013206 (2008)","DOI":"10.1145\/1378533.1378573"},{"key":"7_CR3","doi-asserted-by":"crossref","unstructured":"Arge, L., Goodrich, M.T., Sitchinava, N.: Parallel external memory graph algorithms. In: IPDPS (2010)","DOI":"10.1109\/IPDPS.2010.5470440"},{"key":"7_CR4","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"88","DOI":"10.1007\/978-3-540-87744-8_8","volume-title":"Algorithms - ESA 2008","author":"L. Arge","year":"2008","unstructured":"Arge, L., M\u00f8lhave, T., Zeh, N.: Cache-oblivious red-blue line segment intersection. In: Halperin, D., Mehlhorn, K. (eds.) ESA 2008. LNCS, vol.\u00a05193, pp. 88\u201399. Springer, Heidelberg (2008)"},{"issue":"3","key":"7_CR5","doi-asserted-by":"publisher","first-page":"499","DOI":"10.1137\/0218035","volume":"18","author":"M.J. Atallah","year":"1989","unstructured":"Atallah, M.J., Cole, R., Goodrich, M.T.: Cascading divide-and-conquer: A technique for designing parallel algorithms. SIAM J. Comp.\u00a018(3), 499\u2013532 (1989)","journal-title":"SIAM J. Comp."},{"key":"7_CR6","doi-asserted-by":"crossref","unstructured":"Atallah, M.J., Goodrich, M.T.: Efficient plane sweeping in parallel. In: SOCG, pp. 216\u2013225 (1986)","DOI":"10.1145\/10515.10539"},{"key":"7_CR7","doi-asserted-by":"publisher","first-page":"535","DOI":"10.1007\/BF01762130","volume":"3","author":"M.J. Atallah","year":"1988","unstructured":"Atallah, M.J., Goodrich, M.T.: Parallel algorithms for some functions of two convex polygons. Algorithmica\u00a03, 535\u2013548 (1988)","journal-title":"Algorithmica"},{"key":"7_CR8","doi-asserted-by":"crossref","unstructured":"Bender, M.A., Fineman, J.T., Gilbert, S., Kuszmaul, B.C.: Concurrent cache-oblivious B-trees. In: SPAA, pp. 228\u2013237 (2005)","DOI":"10.1145\/1073970.1074009"},{"key":"7_CR9","unstructured":"Blelloch, G.E., Chowdhury, R.A., Gibbons, P.B., Ramachandran, V., Chen, S., Kozuch, M.: Provably good multicore cache performance for divide-and-conquer algorithms. In: SODA, pp. 501\u2013510 (2008)"},{"key":"7_CR10","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"426","DOI":"10.1007\/3-540-45465-9_37","volume-title":"Automata, Languages and Programming","author":"G.S. Brodal","year":"2002","unstructured":"Brodal, G.S., Fagerberg, R.: Cache oblivious distribution sweeping. In: Widmayer, P., Ruiz, F.T., Bueno, R.M., Hennessy, M., Eidenbenz, S., Conejo, R. (eds.) ICALP 2002. LNCS, vol.\u00a02380, pp. 426\u2013438. Springer, Heidelberg (2002)"},{"key":"7_CR11","doi-asserted-by":"crossref","unstructured":"Chowdhury, R.A., Ramachandran, V.: The cache-oblivious gaussian elimination paradigm: Theoretical framework, parallelization and experimental evaluation. In: SPAA, pp. 71\u201380 (2007)","DOI":"10.1145\/1248377.1248392"},{"key":"7_CR12","doi-asserted-by":"crossref","unstructured":"Chowdhury, R.A., Ramachandran, V.: Cache-efficient dynamic programming for multicores. In: SPAA, pp. 207\u2013216 (2008)","DOI":"10.1145\/1378533.1378574"},{"key":"7_CR13","doi-asserted-by":"crossref","unstructured":"Chowdhury, R.A., Silvestri, F., Blakeley, B., Ramachandran, V.: Oblivious algorithms for multicores and network of processors. In: IPDPS (2010)","DOI":"10.1109\/IPDPS.2010.5470354"},{"key":"7_CR14","doi-asserted-by":"crossref","unstructured":"Datta, A.: Efficient parallel algorithms for geometric partitioning problems through parallel range searching. In: ICPP, pp. 202\u2013209 (1994)","DOI":"10.1109\/ICPP.1994.101"},{"key":"7_CR15","doi-asserted-by":"crossref","unstructured":"Dehne, F., Fabri, A., Rau-Chaplin, A.: Scalable parallel geometric algorithms for coarse grained multicomputers. In: SOCG, pp. 298\u2013307 (1993)","DOI":"10.1145\/160985.161154"},{"key":"7_CR16","unstructured":"Fj\u00e4llstr\u00f6m, P.O.: Parallel algorithms for batched range searching on coarse-grained multicomputers. Link\u00f6ping Electronic Articles in Computer and Information Science\u00a02(3) (1997)"},{"key":"7_CR17","unstructured":"Gibbons, P.: Theory: Asleep at the switch to many-core. In: Workshop on Theory and Many-Cores (T&MC) (May 2009)"},{"issue":"4","key":"7_CR18","doi-asserted-by":"publisher","first-page":"737","DOI":"10.1137\/0220047","volume":"20","author":"M.T. Goodrich","year":"1991","unstructured":"Goodrich, M.T.: Intersecting line segments in parallel with an output-sensitive number of processors. SIAM J. Comp.\u00a020(4), 737\u2013755 (1991)","journal-title":"SIAM J. Comp."},{"key":"7_CR19","doi-asserted-by":"crossref","unstructured":"Goodrich, M.T., Tsay, J.J., Vengroff, D.E., Vitter, J.S.: External-memory computational geometry. In: FOCS, pp. 714\u2013723 (1993)","DOI":"10.1109\/SFCS.1993.366816"},{"key":"7_CR20","unstructured":"Intel Corp.: Futuristic Intel chip could reshape how computers are built, consumers interact with their PCs and personal devices (December 2009), http:\/\/www.intel.com\/pressroom\/archive\/releases\/2009\/20091202comp_sm.htm"},{"key":"7_CR21","unstructured":"Sitchinava, N.: Parallel external memory model \u2013 a parallel model for multi-core architectures. Ph.D. thesis, University of California, Irvine (2009)"}],"container-title":["Lecture Notes in Computer Science","Algorithms \u2013 ESA 2010"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-15781-3_7","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,2,25]],"date-time":"2025-02-25T10:04:57Z","timestamp":1740477897000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-15781-3_7"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010]]},"ISBN":["9783642157806","9783642157813"],"references-count":21,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-15781-3_7","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2010]]}}}