{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,10]],"date-time":"2026-01-10T07:14:14Z","timestamp":1768029254773,"version":"3.49.0"},"publisher-location":"Berlin, Heidelberg","reference-count":13,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"value":"9783642162558","type":"print"},{"value":"9783642162565","type":"electronic"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010]]},"DOI":"10.1007\/978-3-642-16256-5_5","type":"book-chapter","created":{"date-parts":[[2010,10,5]],"date-time":"2010-10-05T12:20:54Z","timestamp":1286281254000},"page":"23-34","source":"Crossref","is-referenced-by-count":9,"title":["Time-Predictable Computing"],"prefix":"10.1007","author":[{"given":"Raimund","family":"Kirner","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peter","family":"Puschner","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"5_CR1","doi-asserted-by":"crossref","unstructured":"Wilhelm, R., Engblom, J., Ermedahl, A., Holsti, N., Thesing, S., Whalley, D., Bernat, G., Ferdinand, C., Heckman, R., Mitra, T., Mueller, F., Puaut, I., Puschner, P., Staschulat, J., Stenstrom, P.: The worst-case execution time problem - overview of methods and survey of tools. ACM Transactions on Embedded Computing Systems (TECS)\u00a07(3) (April 2008)","DOI":"10.1145\/1347375.1347389"},{"key":"5_CR2","doi-asserted-by":"crossref","unstructured":"Kirner, R., Puschner, P.: Obstacles in worst-cases execution time analysis. In: Proc. 11th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing, Orlando, Florida, pp. 333\u2013339 (May 2008)","DOI":"10.1109\/ISORC.2008.65"},{"key":"5_CR3","doi-asserted-by":"crossref","unstructured":"Schoeberl, M.: Time-predictable computer architecture. EURASIP Journal on Embedded Systems (2009)","DOI":"10.1155\/2009\/758480"},{"key":"5_CR4","doi-asserted-by":"publisher","first-page":"157","DOI":"10.1023\/B:TIME.0000045316.66276.6e","volume":"28","author":"L. Thiele","year":"2004","unstructured":"Thiele, L., Wilhelm, R.: Design for Timing Predictability. Real-Time Systems\u00a028, 157\u2013177 (2004)","journal-title":"Real-Time Systems"},{"key":"5_CR5","unstructured":"Grund, D.: Towards a formal definition of timing predictability. In: Workshop on Reconciling Performance with Predictability, Grenoble, France (October 2009)"},{"key":"5_CR6","first-page":"192","volume-title":"The Science of the Artificial","author":"H.A. Simon","year":"1969","unstructured":"Simon, H.A.: The Architecture of Complexity. In: The Science of the Artificial, 1st edn., pp. 192\u2013229. MIT Press, Cambridge (1969) ISBN: 0-262-69023-3","edition":"1"},{"key":"5_CR7","volume-title":"Real-Time Systems - Design Principles for Distributed Embedded Applications","author":"H. Kopetz","year":"1997","unstructured":"Kopetz, H.: Real-Time Systems - Design Principles for Distributed Embedded Applications. Kluwer, Dordrecht (1997) ISBN: 0-7923-9894-7"},{"key":"5_CR8","unstructured":"W\u00f6gerer, W.: The loss of explicity for static WCET analysis during compilation. Master\u2019s thesis, Technische Universit\u00e4t Wien, Vienna, Austria (2003)"},{"key":"5_CR9","doi-asserted-by":"crossref","unstructured":"Kopetz, H., Nossal, R.: Temporal firewalls in large distributed real-time systems. In: 6th IEEE Computer Society Workshop on Future Trends of Distributed Computing Systems (1997)","DOI":"10.1109\/FTDCS.1997.644743"},{"key":"5_CR10","doi-asserted-by":"crossref","unstructured":"Edwards, S.A., Lee, E.A.: The case for the precision timed (pret) machine. In: Proc. 44th Design Automation Conference (DAC), San Diego, California (June 2007)","DOI":"10.1109\/DAC.2007.375165"},{"key":"5_CR11","volume-title":"Proc. IEEE International Conference on Computer Design","author":"S.A. Edwards","year":"2009","unstructured":"Edwards, S.A., Kim, S., Lee, E.A., Liu, I., Patel, H.D., Schoeberl, M.: A disruptive computer design idea: Architectures with repeatable timing. In: Proc. IEEE International Conference on Computer Design. IEEE, Los Alamitos (2009)"},{"key":"5_CR12","doi-asserted-by":"crossref","unstructured":"Wilhelm, R., Ferdinand, C., Cullmann, C., Grund, D., Reineke, J., Triquet, B.: Designing predictable multi-core architectures for avionics and automotive systems. In: Workshop on Reconciling Performance with Predictability, Grenoble, France (October 2009)","DOI":"10.1145\/1543820.1543826"},{"key":"5_CR13","doi-asserted-by":"publisher","first-page":"119","DOI":"10.1109\/ECRTS.2009.8","volume-title":"Proc. 21st Euromicro Conference on Real-Time Systems","author":"R. Kirner","year":"2009","unstructured":"Kirner, R., Kadlec, A., Puschner, P.: Precise worst-case execution time analysis for processors with timing anomalies. In: Proc. 21st Euromicro Conference on Real-Time Systems, Dublin, Ireland, pp. 119\u2013128. IEEE, Los Alamitos (July 2009)"}],"container-title":["Lecture Notes in Computer Science","Software Technologies for Embedded and Ubiquitous Systems"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-16256-5_5.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,11,24]],"date-time":"2020-11-24T02:46:42Z","timestamp":1606186002000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-16256-5_5"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010]]},"ISBN":["9783642162558","9783642162565"],"references-count":13,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-16256-5_5","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"value":"0302-9743","type":"print"},{"value":"1611-3349","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010]]}}}