{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,11,11]],"date-time":"2026-11-11T07:17:20Z","timestamp":1794381440796,"version":"4.9.0"},"publisher-location":"Berlin, Heidelberg","reference-count":23,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"value":"9783642163098","type":"print"},{"value":"9783642163104","type":"electronic"}],"license":[{"start":{"date-parts":[[2010,1,1]],"date-time":"2010-01-01T00:00:00Z","timestamp":1262304000000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010]]},"DOI":"10.1007\/978-3-642-16310-4_10","type":"book-chapter","created":{"date-parts":[[2010,9,30]],"date-time":"2010-09-30T23:44:29Z","timestamp":1285890269000},"page":"140-156","source":"Crossref","is-referenced-by-count":2,"title":["Concurrent Rewriting Semantics and Analysis of Asynchronous Digital Circuits"],"prefix":"10.1007","author":[{"given":"Michael","family":"Katelman","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sean","family":"Keller","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jos\u00e9","family":"Meseguer","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","reference":[{"issue":"6","key":"10_CR1","doi-asserted-by":"publisher","first-page":"9","DOI":"10.1109\/MDT.2003.1246159","volume":"20","author":"A.J. Martin","year":"2003","unstructured":"Martin, A.J., Nystr\u00f6m, M., Wong, C.G.: Three Generations of Asynchronous Microprocessors. IEEE Design & Test of Computers\u00a020(6), 9\u201317 (2003)","journal-title":"IEEE Design & Test of Computers"},{"key":"10_CR2","doi-asserted-by":"crossref","unstructured":"Martin, A., Nystr\u00f6m, M.: Asynchronous Techniques for System-on-Chip Design. Proceedings of the IEEE\u00a094(6) (2006)","DOI":"10.1109\/JPROC.2006.875789"},{"key":"10_CR3","unstructured":"Jang, W., Martin, A.J.: A Soft-error-tolerant Asynchronous Microcontroller. In: 13th NASA Symposium on VLSI Design (2007)"},{"key":"10_CR4","doi-asserted-by":"publisher","first-page":"58","DOI":"10.1109\/ASYNC.2008.22","volume-title":"Proceedings of the 2008 14th IEEE International Symposium on Asynchronous Circuits and Systems","author":"A.J. Martin","year":"2008","unstructured":"Martin, A.J., Prakash, P.: Asynchronous Nano-Electronics: Preliminary Investigation. In: Proceedings of the 2008 14th IEEE International Symposium on Asynchronous Circuits and Systems, pp. 58\u201368. IEEE Computer Society, Los Alamitos (2008)"},{"key":"10_CR5","first-page":"1","volume-title":"Developments in Concurrency and Communication","author":"A.J. Martin","year":"1990","unstructured":"Martin, A.J.: Programming in VLSI: From communicating processes to delay-insensitive circuits. In: Hoare, C.A.R. (ed.) Developments in Concurrency and Communication, pp. 1\u201364. Addison-Wesley, Reading (1990)"},{"key":"10_CR6","doi-asserted-by":"publisher","first-page":"384","DOI":"10.1109\/EDAC.1991.206431","volume-title":"Proceedings of the Conference on European Design Automation","author":"K. Berkel van","year":"1991","unstructured":"van Berkel, K., Kessels, J., Roncken, M., Saeijs, R., Schalij, F.: The VLSI-programming language Tangram and its translation into handshake circuits. In: Proceedings of the Conference on European Design Automation, Amsterdam, The Netherlands, pp. 384\u2013389. IEEE Computer Society Press, Los Alamitos (1991)"},{"key":"10_CR7","doi-asserted-by":"publisher","first-page":"89","DOI":"10.1007\/978-0-387-35064-6_11","volume-title":"Hardware Description Languages and their Applications","author":"A. Bardsley","year":"1997","unstructured":"Bardsley, A., Edwards, D.: Compiling the language Balsa to delay insensitive hardware. In: Hardware Description Languages and their Applications, pp. 89\u201392. Chapman & Hall, Ltd., Boca Raton (1997)"},{"key":"10_CR8","volume-title":"Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems","author":"M. Renaudin","year":"1999","unstructured":"Renaudin, M., Vivet, P., Robin, F.: A Design Framework for Asynchronous\/Synchronous Circuits Based on CHP to VHDL Translation. In: Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems, vol.\u00a0135. IEEE Computer Society, Los Alamitos (1999)"},{"issue":"8","key":"10_CR9","doi-asserted-by":"publisher","first-page":"666","DOI":"10.1145\/359576.359585","volume":"21","author":"C.A.R. Hoare","year":"1978","unstructured":"Hoare, C.A.R.: Communicating sequential processes. ACM Commun.\u00a021(8), 666\u2013677 (1978)","journal-title":"ACM Commun."},{"key":"10_CR10","doi-asserted-by":"crossref","unstructured":"Martin, A.J.: Compiling communicating processes into delay-insensitive VLSI circuits. Distributed Computing 1(4) (1986)","DOI":"10.1007\/BF01660034"},{"key":"10_CR11","series-title":"Lecture Notes in Computer Science","volume-title":"All About Maude - A High-Performance Logical Framework","author":"M. Clavel","year":"2007","unstructured":"Clavel, M., Dur\u00e1n, F., Eker, S., Lincoln, P., Mart\u00ed-Oliet, N., Meseguer, J., Talcott, C.: All About Maude - A High-Performance Logical Framework. How to Specify, Program and Verify Systems in Rewriting Logic. LNCS, vol.\u00a04350. Springer, Heidelberg (2007)"},{"key":"10_CR12","doi-asserted-by":"crossref","unstructured":"Keller, S., Katelman, M., Martin, A.J.: A Necessary and Sufficient Timing Assumption for Speed-Independent Circuits. In: 15th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2009 (2009)","DOI":"10.1109\/ASYNC.2009.27"},{"key":"10_CR13","unstructured":"Katelman, M., Keller, S., Meseguer, J.: Source Code for an Executable Formal Semantics of Production Rule Sets in Maude; with Examples (2010), http:\/\/hdl.handle.net\/2142\/14863"},{"key":"10_CR14","first-page":"263","volume-title":"AUSCRYPT 1990: Proceedings of the sixth MIT conference on Advanced research in VLSI","author":"A.J. Martin","year":"1990","unstructured":"Martin, A.J.: The limitations to delay-insensitivity in asynchronous circuits. In: AUSCRYPT 1990: Proceedings of the sixth MIT conference on Advanced research in VLSI, pp. 263\u2013278. MIT Press, Cambridge (1990)"},{"key":"10_CR15","first-page":"204","volume-title":"Proceedings of an International Symposium on the Theory of Switching","author":"D.E. Muller","year":"1959","unstructured":"Muller, D.E., Bartky, W.S.: A theory of asynchronous circuits. In: Proceedings of an International Symposium on the Theory of Switching, pp. 204\u2013243. Harvard University Press, Cambridge (1959)"},{"key":"10_CR16","series-title":"Sequentical Circuits and Machines","volume-title":"Switching Theory","author":"R.E. Miller","year":"1965","unstructured":"Miller, R.E.: Switching Theory. Sequentical Circuits and Machines, vol.\u00a0II. John Wiley & Sons, Inc., Chichester (1965)"},{"key":"10_CR17","unstructured":"Cook, J.N.: Produciton Rule Verification for Quasi-Delay-Insensitive Circuits. Master\u2019s thesis, California Institute of Technology (1993)"},{"key":"10_CR18","doi-asserted-by":"crossref","unstructured":"Beerel, P.A., Burch, J.R., Meng, T.H.Y.: Sufficient Conditions for Correct Gate-Level Speed-Independent Circuits. In: Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 33\u201343 (1994)","DOI":"10.1109\/ASYNC.1994.656284"},{"key":"10_CR19","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"317","DOI":"10.1007\/3-540-48153-2_24","volume-title":"Correct Hardware Design and Verification Methods","author":"H. Yenig\u00fcn","year":"1999","unstructured":"Yenig\u00fcn, H., Levin, V., Peled, D., Beerel, P.A.: Hazard-Freedom Checking in Speed-Independent Systems. In: Pierre, L., Kropf, T. (eds.) CHARME 1999. LNCS, vol.\u00a01703, pp. 317\u2013320. Springer, Heidelberg (1999)"},{"key":"10_CR20","first-page":"199","volume-title":"International Workshop on Timed Petri Nets","author":"L.Y. Rosenblum","year":"1985","unstructured":"Rosenblum, L.Y., Yakovlev, A.: Signal Graphs: From Self-Timed to Timed Ones. In: International Workshop on Timed Petri Nets, pp. 199\u2013206. IEEE Computer Society, Los Alamitos (1985)"},{"key":"10_CR21","unstructured":"Petri, C.A.: Kommunikation mit Automaten. PhD thesis, Technische Universit\u00e4t Darmstadt (1962)"},{"issue":"12","key":"10_CR22","doi-asserted-by":"publisher","first-page":"85","DOI":"10.1109\/MC.1979.1658580","volume":"12","author":"T. Agerwala","year":"1979","unstructured":"Agerwala, T.: Putting Petri nets to work. IEEE Computer\u00a012(12), 85\u201394 (1979)","journal-title":"IEEE Computer"},{"key":"10_CR23","unstructured":"Papadantonakis, K.: Design Rules for Non-Atomic Implementation of PRS. Technical Report CaltechCSTR:2005.001, California Institute of Technology (2005)"}],"container-title":["Lecture Notes in Computer Science","Rewriting Logic and Its Applications"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-16310-4_10","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,2,25]],"date-time":"2025-02-25T23:31:21Z","timestamp":1740526281000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-16310-4_10"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010]]},"ISBN":["9783642163098","9783642163104"],"references-count":23,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-16310-4_10","relation":{"is-part-of":[{"id-type":"doi","id":"https:\/\/doi.org\/10.1007\/978-3-642-16310-4","asserted-by":"object"}]},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"value":"0302-9743","type":"print"},{"value":"1611-3349","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010]]}}}