{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,27]],"date-time":"2025-03-27T07:32:59Z","timestamp":1743060779235,"version":"3.40.3"},"publisher-location":"Berlin, Heidelberg","reference-count":14,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783642228629"},{"type":"electronic","value":"9783642228636"}],"license":[{"start":{"date-parts":[[2011,1,1]],"date-time":"2011-01-01T00:00:00Z","timestamp":1293840000000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011]]},"DOI":"10.1007\/978-3-642-22863-6_8","type":"book-chapter","created":{"date-parts":[[2011,8,8]],"date-time":"2011-08-08T05:47:55Z","timestamp":1312782475000},"page":"71-86","source":"Crossref","is-referenced-by-count":0,"title":["Towards Robustness Analysis Using PVS"],"prefix":"10.1007","author":[{"given":"Renaud","family":"Clavel","sequence":"first","affiliation":[]},{"given":"Laurence","family":"Pierre","sequence":"additional","affiliation":[]},{"given":"R\u00e9gis","family":"Leveugle","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"doi-asserted-by":"crossref","unstructured":"Baarir, S., Braunstein, C., Clavel, R., Encrenaz, E., Ili\u00e9, J.M., Leveugle, R., Mounier, I., Pierre, L., Poitrenaud, D.: Complementary Formal Approaches for Dependability Analysis. In: Proc. IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2009) (2009)","key":"8_CR1","DOI":"10.1109\/DFT.2009.21"},{"unstructured":"Baarir, S., Braunstein, C., Encrenaz, E., Ili\u00e9, J.M., Li, T., Mounier, I., Poitrenaud, D., Younes, S.: Quantifying Robustness by Symbolic Model Checking. In: Proc. Hardware Verification Workshop (July 2010)","key":"8_CR2"},{"unstructured":"Crow, J., Owre, S., Rushby, J.M., Shankar, N., Srivas, M.: A Tutorial Introduction to PVS. In: Proc. Workshop on Industrial-Strength Formal Specification Techniques (1995)","key":"8_CR3"},{"doi-asserted-by":"crossref","unstructured":"Darbari, A., Al-Hashimi, B., Harrod, P., Bradley, D.: A New Approach for Transient Fault Injection using Symbolic Simulation. In: Proc. IEEE International On-Line Testing Symposium (2008)","key":"8_CR4","DOI":"10.1109\/IOLTS.2008.59"},{"doi-asserted-by":"crossref","unstructured":"Fey, G., Drechsler, R.: A Basis for Formal Robustness Checking. In: Proc. IEEE International Symposium on Quality Electronic Design (2008)","key":"8_CR5","DOI":"10.1109\/ISQED.2008.4479838"},{"doi-asserted-by":"crossref","unstructured":"Hasan, O., Tahar, S., Abbasi, N.: Formal Reliability Analysis Using Theorem Proving. IEEE Trans. on Computers\u00a059(5) (2010)","key":"8_CR6","DOI":"10.1109\/TC.2009.165"},{"key":"8_CR7","volume-title":"Computer Aided Reasoning: an Approach","author":"M. Kaufmann","year":"2002","unstructured":"Kaufmann, M., Manolios, P., Moore, J.: Computer Aided Reasoning: an Approach. Kluwer Academic Pub., Dordrecht (2002)"},{"doi-asserted-by":"crossref","unstructured":"Kaufmann, M., Moore, J.: Structured theory development for a mechanized logic. Journal of Automated Reasoning\u00a026 (2001)","key":"8_CR8","DOI":"10.1023\/A:1026517200045"},{"doi-asserted-by":"crossref","unstructured":"Krautz, U., Pflanz, M., Jacobi, C., Tast, H., Weber, K., Vierhaus, H.: Evaluating Coverage of Error Detection Logic for Soft Errors using Formal Methods. In: Proc. DATE 2006 (2006)","key":"8_CR9","DOI":"10.1109\/DATE.2006.244062"},{"doi-asserted-by":"crossref","unstructured":"Leveugle, R., Hadjiat, K.: Multi-level fault injections in VHDL descriptions: alternative approaches and experiments. Journal of Electronic Testing: Theory and Applications\u00a019(5) (October 2003)","key":"8_CR10","DOI":"10.1023\/A:1025178014797"},{"doi-asserted-by":"crossref","unstructured":"Ouchet, F., Borrione, D., Morin-Allory, K., Pierre, L.: High-level symbolic simulation for automatic model extraction. In: Proc. IEEE Symposium on Design and Diagnostics of Electronic Systems (2009)","key":"8_CR11","DOI":"10.1109\/DDECS.2009.5012132"},{"key":"8_CR12","series-title":"Lecture Notes in Computer Science","volume-title":"Automated Deduction - CADE-11","author":"S. Owre","year":"1992","unstructured":"Owre, S., Rushby, J.M., Shankar, N.: PVS: A prototype verification system. In: Kapur, D. (ed.) CADE 1992. LNCS, vol.\u00a0607, Springer, Heidelberg (1992)"},{"doi-asserted-by":"crossref","unstructured":"Pierre, L., Clavel, R., Leveugle, R.: ACL2 for the Verification of Fault-Tolerance Properties: First Results. In: Proc. International Workshop on the ACL2 Theorem Prover and Its Applications (2009)","key":"8_CR13","DOI":"10.1145\/1637837.1637852"},{"doi-asserted-by":"crossref","unstructured":"Seshia, S., Li, W., Mitra, S.: Verification-guided soft error resilience. In: Proc. DATE 2007 (April 2007)","key":"8_CR14","DOI":"10.1109\/DATE.2007.364501"}],"container-title":["Lecture Notes in Computer Science","Interactive Theorem Proving"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-22863-6_8","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,6,13]],"date-time":"2019-06-13T18:13:37Z","timestamp":1560449617000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-22863-6_8"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011]]},"ISBN":["9783642228629","9783642228636"],"references-count":14,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-22863-6_8","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2011]]}}}