{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,10]],"date-time":"2026-07-10T16:36:38Z","timestamp":1783701398282,"version":"3.55.0"},"publisher-location":"Berlin, Heidelberg","reference-count":16,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"value":"9783642239502","type":"print"},{"value":"9783642239519","type":"electronic"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011]]},"DOI":"10.1007\/978-3-642-23951-9_2","type":"book-chapter","created":{"date-parts":[[2011,9,26]],"date-time":"2011-09-26T01:17:11Z","timestamp":1316999831000},"page":"17-32","source":"Crossref","is-referenced-by-count":93,"title":["FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control"],"prefix":"10.1007","author":[{"given":"Mehrdad","family":"Majzoobi","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Farinaz","family":"Koushanfar","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Srinivas","family":"Devadas","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","reference":[{"key":"2_CR1","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"166","DOI":"10.1007\/978-3-540-45238-6_14","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2003","author":"B. Barak","year":"2003","unstructured":"Barak, B., Shaltiel, R., Tromer, E.: True random number generators secure in a changing environment. In: Walter, C.D., Ko\u00e7, \u00c7.K., Paar, C. (eds.) CHES 2003. LNCS, vol.\u00a02779, pp. 166\u2013180. Springer, Heidelberg (2003)"},{"key":"2_CR2","doi-asserted-by":"crossref","unstructured":"Bergeron, E., Feeley, M., Daigneault, M.A., David, J.: Using dynamic reconfiguration to implement high-resolution programmable delays on an FPGA. In: NEWCAS-TAISA, pp. 265\u2013268 (2008)","DOI":"10.1109\/NEWCAS.2008.4606372"},{"key":"2_CR3","doi-asserted-by":"crossref","unstructured":"Gassend, B., Clarke, D., van Dijk, M., Devadas, S.: Silicon physical random functions. In: CCS, pp. 148\u2013160 (2002)","DOI":"10.1145\/586110.586132"},{"key":"2_CR4","unstructured":"Jun, B., Kocher, P.: The Intel random number generator. In: Cryptography Research, Inc. (1999)"},{"key":"2_CR5","unstructured":"Lee, J., Lim, D., Gassend, B., Suh, G., van Dijk, M., Devadas, S.: A technique to build a secret key in integrated circuits for identification and authentication applications. In: Symposium on VLSI Circuits, pp. 176\u2013179 (2004)"},{"key":"2_CR6","doi-asserted-by":"crossref","unstructured":"Majzoobi, M., Dyer, E., Elnably, A., Koushanfar, F.: Rapid FPGA characterization using clock synthesis and signal sparsity. In: International Test Conference, ITC (2010)","DOI":"10.1109\/TEST.2010.5699248"},{"issue":"99","key":"2_CR7","first-page":"1","volume":"PP","author":"M. Majzoobi","year":"2011","unstructured":"Majzoobi, M., Koushanfar, F.: FPGA time-bounded authentication. IEEE Transactions on Information Forensics and Security\u00a0PP(99), 1 (2011)","journal-title":"IEEE Transactions on Information Forensics and Security"},{"key":"2_CR8","doi-asserted-by":"crossref","unstructured":"Majzoobi, M., Koushanfar, F., Devadas, S.: FPGA PUF using programmable delay lines. In: IEEE Workshop on Information Forensics and Security (WIFS), pp. 1\u20136 (2010)","DOI":"10.1109\/WIFS.2010.5711471"},{"key":"2_CR9","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1007\/978-3-642-16435-4_1","volume-title":"Information Hiding","author":"M. Majzoobi","year":"2010","unstructured":"Majzoobi, M., Elnably, A., Koushanfar, F.: FPGA time-bounded unclonable authentication. In: B\u00f6hme, R., Fong, P.W.L., Safavi-Naini, R. (eds.) IH 2010. LNCS, vol.\u00a06387, pp. 1\u201316. Springer, Heidelberg (2010)"},{"key":"2_CR10","first-page":"768","volume":"5","author":"J. Neumann von","year":"1963","unstructured":"von Neumann, J.: Various techniques used in connection with random digits. von Neumann Collected Works\u00a05, 768\u2013770 (1963)","journal-title":"von Neumann Collected Works"},{"key":"2_CR11","unstructured":"O\u2019Donnell, C.W., Suh, G.E., Devadas, S.: PUF-based random number generation. In: MIT CSAIL CSG Technical Memo 481, p. 2004 (2004)"},{"key":"2_CR12","doi-asserted-by":"crossref","unstructured":"Schellekens, D., Preneel, B., Verbauwhede, I.: FPGA vendor agnostic true random number generator. In: Field Programmable Logic and Applications (FPL), pp. 1\u20136 (2006)","DOI":"10.1109\/FPL.2006.311206"},{"key":"2_CR13","doi-asserted-by":"crossref","unstructured":"Suh, G., Devadas, S.: Physical unclonable functions for device authentication and secret key generation. In: Design Automation Conference (DAC), p. 914 (2007)","DOI":"10.1109\/DAC.2007.375043"},{"key":"2_CR14","volume-title":"Cryptographic Engineering","author":"B. Sunar","year":"2009","unstructured":"Sunar, B.: True Random Number Generators for Cryptography. In: Cryptographic Engineering. Springer, Heidelberg (2009)"},{"key":"2_CR15","doi-asserted-by":"publisher","first-page":"109","DOI":"10.1109\/TC.2007.250627","volume":"58","author":"B. Sunar","year":"2007","unstructured":"Sunar, B., Martin, W.J., Stinson, D.R.: A provably secure true random number generator with built-in tolerance to active attacks. IEEE Transactions on Computers\u00a058, 109\u2013119 (2007)","journal-title":"IEEE Transactions on Computers"},{"issue":"2","key":"2_CR16","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/1534916.1534920","volume":"2","author":"J.S.J. Wong","year":"2009","unstructured":"Wong, J.S.J., Sedcole, P., Cheung, P.Y.K.: Self-Measurement of Combinatorial Circuit Delays in FPGAs. ACM Transactions on Reconfigurable Technology and Systems\u00a02(2), 1\u201322 (2009)","journal-title":"ACM Transactions on Reconfigurable Technology and Systems"}],"container-title":["Lecture Notes in Computer Science","Cryptographic Hardware and Embedded Systems \u2013 CHES 2011"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-23951-9_2.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,11,23]],"date-time":"2020-11-23T22:15:01Z","timestamp":1606169701000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-23951-9_2"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011]]},"ISBN":["9783642239502","9783642239519"],"references-count":16,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-23951-9_2","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"value":"0302-9743","type":"print"},{"value":"1611-3349","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011]]}}}