{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,16]],"date-time":"2026-03-16T16:24:02Z","timestamp":1773678242361,"version":"3.50.1"},"publisher-location":"Berlin, Heidelberg","reference-count":5,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"value":"9783642242724","type":"print"},{"value":"9783642242731","type":"electronic"}],"license":[{"start":{"date-parts":[[2011,1,1]],"date-time":"2011-01-01T00:00:00Z","timestamp":1293840000000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011]]},"DOI":"10.1007\/978-3-642-24273-1_29","type":"book-chapter","created":{"date-parts":[[2011,9,27]],"date-time":"2011-09-27T18:27:24Z","timestamp":1317148044000},"page":"218-224","source":"Crossref","is-referenced-by-count":3,"title":["3DES Implementation Based on FPGA"],"prefix":"10.1007","author":[{"given":"Fang","family":"Ren","sequence":"first","affiliation":[]},{"given":"Leihua","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Tao","family":"Zhang","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"29_CR1","unstructured":"Yang Bo. \u201cModern cryptology,\u201d .Peiking: press house of Tsinghua university,200:3146:148-149."},{"key":"29_CR2","unstructured":"Pan, W.: development and realization of DES encryption chip. Jinan university Master\u2019s paper (June 2008)"},{"key":"29_CR3","unstructured":"Dang, Z., Zhang, G.: Design and realization of IP core in high speed3_DES algorithm. CPLA University of Information Science and Technology, Master\u2019s paper (April 2007)"},{"issue":"21","key":"29_CR4","first-page":"55","volume":"27","author":"J. Shao","year":"2004","unstructured":"Shao, J., He, Z.: High speed realization of 3DES\u2019 encryption algorithm, based on FPGA. Modern Electronic Technology\u00a027(21), 55\u201357 (2004)","journal-title":"Modern Electronic Technology"},{"key":"29_CR5","unstructured":"Li, Y., Song, R., Lei, J., Du, J.: Xilink FPGA Foundation of design (Version of VHDL). Press house of Xidian university, Xi\u2019an (February 2008)"}],"container-title":["Communications in Computer and Information Science","Emerging Research in Web Information Systems and Mining"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-24273-1_29","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,4,7]],"date-time":"2019-04-07T22:38:08Z","timestamp":1554676688000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-24273-1_29"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011]]},"ISBN":["9783642242724","9783642242731"],"references-count":5,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-24273-1_29","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"value":"1865-0929","type":"print"},{"value":"1865-0937","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011]]}}}