{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,20]],"date-time":"2025-03-20T14:10:08Z","timestamp":1742479808172,"version":"3.40.1"},"publisher-location":"Berlin, Heidelberg","reference-count":25,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783642282928"},{"type":"electronic","value":"9783642282935"}],"license":[{"start":{"date-parts":[[2012,1,1]],"date-time":"2012-01-01T00:00:00Z","timestamp":1325376000000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012]]},"DOI":"10.1007\/978-3-642-28293-5_2","type":"book-chapter","created":{"date-parts":[[2012,2,11]],"date-time":"2012-02-11T07:15:48Z","timestamp":1328944548000},"page":"13-24","source":"Crossref","is-referenced-by-count":9,"title":["A Case Study on Error Resilient Architectures for Wireless Communication"],"prefix":"10.1007","author":[{"given":"Christian","family":"Brehm","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Matthias","family":"May","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Christina","family":"Gimmler","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Norbert","family":"Wehn","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"doi-asserted-by":"crossref","unstructured":"Designing Chips without Guarantees. IEEE Design & Test of Computers 27(5), 60\u201367 (2010)","key":"2_CR1","DOI":"10.1109\/MDT.2010.105"},{"issue":"12","key":"2_CR2","doi-asserted-by":"publisher","first-page":"4906","DOI":"10.1109\/TSP.2009.2026078","volume":"57","author":"R.A. Abdallah","year":"2009","unstructured":"Abdallah, R.A., Shanbhag, N.R.: Error-Resilient Low-Power Viterbi Decoder Architectures. IEEE Transactions on Signal Processing\u00a057(12), 4906\u20134917 (2009)","journal-title":"IEEE Transactions on Signal Processing"},{"doi-asserted-by":"crossref","unstructured":"Autran, J.L., Roche, P., Sauze, S., Gasiot, G., Munteanu, D., Loaiza, P., Zampaolo, M., Borel, J.: Altitude and underground real-time SER characterization of CMOS 65nm SRAM. In: Proc. European Conf. Radiation and Its Effects Components and Systems (RADECS), pp. 519\u2013524 (2008)","key":"2_CR3","DOI":"10.1109\/RADECS.2008.5782774"},{"issue":"6","key":"2_CR4","doi-asserted-by":"publisher","first-page":"10","DOI":"10.1109\/MM.2005.110","volume":"25","author":"S. Borkar","year":"2005","unstructured":"Borkar, S.: Designing reliable systems from unreliable components: the challenges of transistor variability and degradation. IEEE Micro\u00a025(6), 10\u201316 (2005)","journal-title":"IEEE Micro"},{"doi-asserted-by":"crossref","unstructured":"Breuer, M.A.: Multi-media applications and imprecise computation. In: Proc. 8th Euromicro Conference on Digital System Design, pp. 2\u20137 (August-September 2005)","key":"2_CR5","DOI":"10.1109\/DSD.2005.58"},{"doi-asserted-by":"crossref","unstructured":"Chippa, V.K., Mohapatra, D., Raghunathan, A., Roy, K., Chakradhar, S.T.: Scalable effort hardware design: Exploiting algorithmic resilience for energy efficiency. In: Proc. 47th ACM\/IEEE Design Automation Conf. (DAC), pp. 555\u2013560 (2010)","key":"2_CR6","DOI":"10.1145\/1837274.1837411"},{"doi-asserted-by":"crossref","unstructured":"Clermidy, F., Bernard, C., Lemaire, R., Martin, J., Miro-Panades, I., Thonnart, Y., Vivet, P., Wehn, N.: A 477mW NoC-Based Digital Baseband for MIMO 4G SDR. In: Proc. IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2010, San Francisco, USA, vol.\u00a053, pp. 278\u2013279 (February 2010)","key":"2_CR7","DOI":"10.1109\/ISSCC.2010.5433920"},{"issue":"1","key":"2_CR8","doi-asserted-by":"publisher","first-page":"32","DOI":"10.1109\/JSSC.2008.2007145","volume":"44","author":"S. Das","year":"2009","unstructured":"Das, S., Tokunaga, C., Pant, S., Ma, W.H., Kalaiselvan, S., Lai, K., Bull, D.M., Blaauw, D.T.: RazorII: In Situ Error Detection and Correction for PVT and SER Tolerance. IEEE Journal of Solid-State Circuits\u00a044(1), 32\u201348 (2009)","journal-title":"IEEE Journal of Solid-State Circuits"},{"doi-asserted-by":"crossref","unstructured":"Dixit, A., Wood, A.: The impact of new technology on soft error rates. In: Proc. IEEE Int. Reliability Physics Symp., IRPS (2011)","key":"2_CR9","DOI":"10.1109\/IRPS.2011.5784522"},{"unstructured":"Dubey, P.: Recognition, Mining and Synthesis Moves Computers to the Era of Tera. Technology@Intel Magazine, 1\u20138 (February 2005)","key":"2_CR10"},{"doi-asserted-by":"crossref","unstructured":"Eltawil, A.M., Kurdahi, F.J.: System Redundancy; A Means of Improving Process Variation Yield Degradation in Memory Arrays. In: Proc. International Symposium on VLSI Design, Automation and Test, pp. 1\u20134 (April 2006)","key":"2_CR11","DOI":"10.1109\/VDAT.2006.258144"},{"doi-asserted-by":"crossref","unstructured":"Gimmler, C., Lehnigk-Emden, T., Wehn, N.: Low-Complexity Iteration Control for MIMO-BICM Systems. In: Proc. IEEE 21st International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC 2010, Istanbul, Turkey (2010)","key":"2_CR12","DOI":"10.1109\/PIMRC.2010.5671725"},{"doi-asserted-by":"crossref","unstructured":"Hussien, A.M.A., Khairy, M.S., Khajeh, A., Amiri, K., Eltawil, A.M., Kurdahi, F.J.: A combined channel and hardware noise resilient Viterbi decoder. In: Proc. Conf. Signals, Systems and Computers (ASILOMAR) Record of the Forty Fourth Asilomar Conf., pp. 395\u2013399 (2010)","key":"2_CR13","DOI":"10.1109\/ACSSC.2010.5757543"},{"doi-asserted-by":"crossref","unstructured":"Khajeh, A., Kim, M., Dutt, N., Eltawil, A.M., Kurdahi, F.J.: Cross-layer co-exploration of exploiting error resilience for video over wireless applications. In: Proc. IEEE\/ACM\/IFIP Workshop Embedded Systems for Real-Time Multimedia, ESTImedia 2008, pp. 13\u201318 (2008)","key":"2_CR14","DOI":"10.1109\/ESTMED.2008.4696987"},{"doi-asserted-by":"crossref","unstructured":"Leem, L., Cho, H., Bau, J., Jacobson, Q.A., Mitra, S.: ERSA: Error Resilient System Architecture for probabilistic applications. In: Proc. Design, Automation & Test in Europe Conf. & Exhibition (DATE), pp. 1560\u20131565 (2010)","key":"2_CR15","DOI":"10.1109\/DATE.2010.5457059"},{"key":"2_CR16","doi-asserted-by":"publisher","first-page":"309","DOI":"10.1007\/978-1-4419-6175-4_19","volume-title":"Processor and System-on-Chip Simulation","author":"T. Lehnigk-Emden","year":"2010","unstructured":"Lehnigk-Emden, T., Alles, M., Brack, T., Wehn, N.: Simulation Acceleration in Wireless Baseband Processing. In: Processor and System-on-Chip Simulation, pp. 309\u2013324. Springer, Heidelberg (2010)"},{"issue":"3","key":"2_CR17","doi-asserted-by":"publisher","first-page":"439","DOI":"10.1109\/TVLSI.2008.2004545","volume":"17","author":"Y. Liu","year":"2009","unstructured":"Liu, Y., Zhang, T., Hu, J.: Design of Voltage Overscaled Low-Power Trellis Decoders in Presence of Process Variations. IEEE Transactions on Very Large Scale Integration (VLSI) Systems\u00a017(3), 439\u2013443 (2009)","journal-title":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems"},{"doi-asserted-by":"crossref","unstructured":"May, M., Alles, M., Wehn, N.: A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder. In: Proc. Design, Automation and Test in Europe, DATE 2008, Munich, Germany, pp. 456\u2013461 (March 2008)","key":"2_CR18","DOI":"10.1109\/DATE.2008.4484723"},{"doi-asserted-by":"crossref","unstructured":"May, M., Wehn, N., Bouajila, A., Zeppenfeld, J., Stechele, W., Herkersdorf, A., Ziener, D., Teich, J.: A Rapid Prototyping System for Error-Resilient Multi-Processor Systems-on-Chip. In: Proc. Design, Automation and Test in Europe (DATE 2010), pp. 375\u2013380 (March 2010)","key":"2_CR19","DOI":"10.1109\/DATE.2010.5457176"},{"issue":"1","key":"2_CR20","doi-asserted-by":"publisher","first-page":"30","DOI":"10.1109\/JETCAS.2011.2135630","volume":"1","author":"S. Mitra","year":"2011","unstructured":"Mitra, S., Brelsford, K., Kim, Y.M., Lee, H.H.K., Li, Y.: Robust System Design to Overcome CMOS Reliability Challenges. IEEE Journal on Emerging and Selected Topics in Circuits and Systems\u00a01(1), 30\u201341 (2011)","journal-title":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems"},{"key":"2_CR21","doi-asserted-by":"crossref","first-page":"195","DOI":"10.1145\/1594233.1594282","volume-title":"Proceedings of the 14th ACM\/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2009","author":"D. Mohapatra","year":"2009","unstructured":"Mohapatra, D., Karakonstantis, G., Roy, K.: Significance driven computation: a voltage-scalable, variation-aware, quality-tuning motion estimator. In: Proceedings of the 14th ACM\/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2009, pp. 195\u2013200. ACM, New York (2009), http:\/\/doi.acm.org\/10.1145\/1594233.1594282"},{"issue":"9","key":"2_CR22","doi-asserted-by":"publisher","first-page":"1123","DOI":"10.1109\/TC.2005.145","volume":"54","author":"K.V. Palem","year":"2005","unstructured":"Palem, K.V.: Energy aware computing through probabilistic switching: a study of limits. IEEE Transactions on Computers\u00a054(9), 1123\u20131137 (2005)","journal-title":"IEEE Transactions on Computers"},{"doi-asserted-by":"crossref","unstructured":"Shanbhag, N.R., Abdallah, R.A., Kumar, R., Jones, D.L.: Stochastic computation. In: Proc. 47th ACM\/IEEE Design Automation Conf. (DAC), pp. 859\u2013864 (2010)","key":"2_CR23","DOI":"10.1145\/1837274.1837491"},{"key":"2_CR24","doi-asserted-by":"publisher","first-page":"379","DOI":"10.1002\/j.1538-7305.1948.tb01338.x","volume":"27","author":"C.E. Shannon","year":"1948","unstructured":"Shannon, C.E.: A Mathematical Theory of Communication. Bell System Technical Journal\u00a027, 379\u2013423, 623\u2013656 (1948), http:\/\/cm.bell-labs.com\/cm\/ms\/what\/shannonday\/paper.html","journal-title":"Bell System Technical Journal"},{"key":"2_CR25","doi-asserted-by":"publisher","first-page":"1309","DOI":"10.1109\/TVLSI.2008.2002428","volume":"16","author":"T. Vogt","year":"2008","unstructured":"Vogt, T., Wehn, N.: A Reconfigurable ASIP for Convolutional and Turbo Decoding in a SDR Environment. IEEE Transactions on Very Large Scale Integration (VLSI) Systems\u00a016, 1309\u20131320 (2008)","journal-title":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems"}],"container-title":["Lecture Notes in Computer Science","Architecture of Computing Systems \u2013 ARCS 2012"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-28293-5_2","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,20]],"date-time":"2025-03-20T13:38:29Z","timestamp":1742477909000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-28293-5_2"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012]]},"ISBN":["9783642282928","9783642282935"],"references-count":25,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-28293-5_2","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2012]]}}}