{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,13]],"date-time":"2026-03-13T12:55:44Z","timestamp":1773406544990,"version":"3.50.1"},"publisher-location":"Berlin, Heidelberg","reference-count":4,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"value":"9783642314933","type":"print"},{"value":"9783642314940","type":"electronic"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012]]},"DOI":"10.1007\/978-3-642-31494-0_45","type":"book-chapter","created":{"date-parts":[[2012,6,27]],"date-time":"2012-06-27T09:28:40Z","timestamp":1340789320000},"page":"364-366","source":"Crossref","is-referenced-by-count":5,"title":["Design and Implementation of Efficient Vedic Multiplier Using Reversible Logic"],"prefix":"10.1007","author":[{"given":"P.","family":"Saravanan","sequence":"first","affiliation":[]},{"given":"P.","family":"Chandrasekar","sequence":"additional","affiliation":[]},{"given":"Livya","family":"Chandran","sequence":"additional","affiliation":[]},{"given":"Nikilla","family":"Sriram","sequence":"additional","affiliation":[]},{"given":"P.","family":"Kalpana","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"45_CR1","doi-asserted-by":"crossref","unstructured":"Tiwari, H.D., Gankhuyag, G., Kim, C.M., Cho, Y.B.: Multiplier design based on ancient Indian Vedic Mathematics. In: IEEE International Conference on SoC Design. IEEE (2008)","DOI":"10.1109\/SOCDC.2008.4815685"},{"key":"45_CR2","doi-asserted-by":"crossref","unstructured":"Bennett, C.H.: Logical reversibility of computation. IBM Journal of Research and Development, 525\u2013532 (1973)","DOI":"10.1147\/rd.176.0525"},{"issue":"3-4","key":"45_CR3","doi-asserted-by":"publisher","first-page":"219","DOI":"10.1007\/BF01857727","volume":"21","author":"E. Fredkin","year":"1982","unstructured":"Fredkin, E., Toffoli, T.: Conservative logic. International Journal of Theoretical Physics\u00a021(3-4), 219\u2013253 (1982)","journal-title":"International Journal of Theoretical Physics"},{"issue":"2","key":"45_CR4","first-page":"2151","volume":"2","author":"H.R. Bhagyalakshmi","year":"2010","unstructured":"Bhagyalakshmi, H.R., Venkatesha, M.K.: Optimized reversible BCD adder using new reversible logic gates. Journal of Computing\u00a02(2) (2010) ISSN 2151-9617","journal-title":"Journal of Computing"}],"container-title":["Lecture Notes in Computer Science","Progress in VLSI Design and Test"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-31494-0_45.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,5,4]],"date-time":"2021-05-04T08:04:06Z","timestamp":1620115446000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-31494-0_45"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012]]},"ISBN":["9783642314933","9783642314940"],"references-count":4,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-31494-0_45","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"value":"0302-9743","type":"print"},{"value":"1611-3349","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012]]}}}