{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T06:12:29Z","timestamp":1725689549280},"publisher-location":"Berlin, Heidelberg","reference-count":2,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783642314933"},{"type":"electronic","value":"9783642314940"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012]]},"DOI":"10.1007\/978-3-642-31494-0_51","type":"book-chapter","created":{"date-parts":[[2012,6,27]],"date-time":"2012-06-27T13:28:40Z","timestamp":1340803720000},"page":"379-380","source":"Crossref","is-referenced-by-count":0,"title":["Simulation Study of an Ultra Thin Body Silicon On Insulator Tunnel Field Effect Transistor"],"prefix":"10.1007","author":[{"given":"Partha Sarathi","family":"Gupta","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sayan","family":"Kanungo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hafizur","family":"Rahaman","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Partha Sarathi","family":"Dasgupta","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"51_CR1","doi-asserted-by":"crossref","unstructured":"Choi, W.Y., Park, B.-G., Lee, J.D., Liu, T.-J.K.: Tunneling Field-Effect Transistors (TFETs) With Subthreshold Swing (SS) Less Than 60 mV\/dec. IEEE Electron Device Letters\u00a028(8) (August 2007)","DOI":"10.1109\/LED.2007.901273"},{"key":"51_CR2","doi-asserted-by":"crossref","unstructured":"Gandhi, R., Chen, Z., Singh, N., Banerjee, K.: Vertical Si-Nanowire n-Type Tunneling FETs With Low Subthreshold Swing (\u2264 50 mV\/decade) at Room Temperature. IEEE Electron Device Letters\u00a032(4) (April 2011)","DOI":"10.1109\/LED.2011.2106757"}],"container-title":["Lecture Notes in Computer Science","Progress in VLSI Design and Test"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-31494-0_51.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,5,4]],"date-time":"2021-05-04T12:04:09Z","timestamp":1620129849000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-31494-0_51"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012]]},"ISBN":["9783642314933","9783642314940"],"references-count":2,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-31494-0_51","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2012]]}}}