{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,9]],"date-time":"2024-09-09T13:52:38Z","timestamp":1725889958992},"publisher-location":"Berlin, Heidelberg","reference-count":23,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783642361562"},{"type":"electronic","value":"9783642361579"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013]]},"DOI":"10.1007\/978-3-642-36157-9_11","type":"book-chapter","created":{"date-parts":[[2013,1,2]],"date-time":"2013-01-02T01:22:00Z","timestamp":1357089720000},"page":"103-112","source":"Crossref","is-referenced-by-count":3,"title":["Muller C-Element Metastability Containment"],"prefix":"10.1007","author":[{"given":"Thomas","family":"Polzer","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Andreas","family":"Steininger","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jakob","family":"Lechner","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"issue":"5","key":"11_CR1","doi-asserted-by":"publisher","first-page":"665","DOI":"10.1109\/5.929649","volume":"89","author":"E.G. Friedman","year":"2001","unstructured":"Friedman, E.G.: Clock Distribution Networks in Synchronous Digital Integrated Circuits. Proceedings of the IEEE\u00a089(5), 665\u2013692 (2001)","journal-title":"Proceedings of the IEEE"},{"issue":"11","key":"11_CR2","doi-asserted-by":"publisher","first-page":"1448","DOI":"10.1109\/JSSC.2002.803943","volume":"37","author":"S.D. Naffziger","year":"2002","unstructured":"Naffziger, S.D., Colon-Bonet, G., Fischer, T., Riedlinger, R., Sullivan, T.J., Grutkowski, T.: The Implementation of the Itanium 2 Microprocessor. IEEE Journal of Solid-State Circuits\u00a037(11), 1448\u20131460 (2002)","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"5","key":"11_CR3","doi-asserted-by":"publisher","first-page":"8","DOI":"10.1109\/MDT.2011.71","volume":"28","author":"S.M. Nowick","year":"2011","unstructured":"Nowick, S.M., Singh, M.: High-Performance Asynchronous Pipelines: An Overview. IEEE Design and Test of Computers\u00a028(5), 8\u201322 (2011)","journal-title":"IEEE Design and Test of Computers"},{"issue":"2","key":"11_CR4","doi-asserted-by":"publisher","first-page":"401","DOI":"10.1109\/JSSC.2009.2036764","volume":"45","author":"I.J. Chang","year":"2010","unstructured":"Chang, I.J., Park, S.P., Roy, K.: Exploring Asynchronous Design Techniques for Process-Tolerant and Energy-Efficient Subthreshold Operation. IEEE Journal of Solid-State Circuits\u00a045(2), 401\u2013410 (2010)","journal-title":"IEEE Journal of Solid-State Circuits"},{"doi-asserted-by":"crossref","unstructured":"Ginosar, R.: Fourteen Ways to Fool Your Synchronizer. In: International Symposium on Asynchronous Circuits and Systems, pp. 89\u201396 (2003)","key":"11_CR5","DOI":"10.1109\/ASYNC.2003.1199169"},{"doi-asserted-by":"crossref","unstructured":"Kinniment, D.: Synchronization and Arbitration in Digital Systems. Wiley (2007)","key":"11_CR6","DOI":"10.1002\/9780470517147"},{"unstructured":"Cheng, F.-C., Ho, S.-L.: Efficient Systematic Error-Correcting Codes for Semi-Delay-Insensitive Data Transmission. In: International Conference on Computer Design, pp. 24\u201329 (2001)","key":"11_CR7"},{"issue":"6","key":"11_CR8","doi-asserted-by":"publisher","first-page":"4","DOI":"10.1109\/MDT.1987.295189","volume":"4","author":"L. Kleeman","year":"1987","unstructured":"Kleeman, L., Cantoni, A.: Metastable Behavior in Digital Systems. IEEE Design and Test of Computers\u00a04(6), 4\u201319 (1987)","journal-title":"IEEE Design and Test of Computers"},{"issue":"4","key":"11_CR9","doi-asserted-by":"publisher","first-page":"421","DOI":"10.1109\/T-C.1973.223730","volume":"22","author":"T.J. Chaney","year":"1973","unstructured":"Chaney, T.J., Molnar, C.E.: Anomalous Behavior of Synchronizer and Arbiter Circuits. IEEE Transactions on Computers C\u00a022(4), 421\u2013422 (1973)","journal-title":"IEEE Transactions on Computers C"},{"issue":"1","key":"11_CR10","doi-asserted-by":"publisher","first-page":"108","DOI":"10.1109\/PGEC.1966.264407","volume":"EC-15","author":"I. Catt","year":"1966","unstructured":"Catt, I.: Time Loss Through Gating of Asynchronous Logic Signal Pulses. IEEE Transactions on Electronic Computers\u00a0EC-15(1), 108\u2013111 (1966)","journal-title":"IEEE Transactions on Electronic Computers"},{"issue":"2","key":"11_CR11","doi-asserted-by":"publisher","first-page":"169","DOI":"10.1109\/JSSC.1980.1051359","volume":"15","author":"H. Veendrick","year":"1980","unstructured":"Veendrick, H.: The Behavior of Flip-Flops Used as Synchronizers and Prediction of Their Failure Rate. IEEE Journal of Solid-State Circuits\u00a015(2), 169\u2013176 (1980)","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"2","key":"11_CR12","doi-asserted-by":"publisher","first-page":"550","DOI":"10.1109\/JSSC.2007.913160","volume":"43","author":"J. Zhou","year":"2008","unstructured":"Zhou, J., Kinniment, D.J., Dike, C.E., Russell, G., Yakovlev, A.: On-Chip Measurement of Deep Metastability in Synchronizers. IEEE Journal of Solid-State Circuits\u00a043(2), 550\u2013557 (2008)","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"1","key":"11_CR13","doi-asserted-by":"publisher","first-page":"57","DOI":"10.1109\/JSSC.1987.1052671","volume":"22","author":"T. Kacprzak","year":"1987","unstructured":"Kacprzak, T., Albicki, A.: Analysis of Metastable Operation in RS CMOS Flip-Flops. IEEE Journal of Solid-State Circuits\u00a022(1), 57\u201364 (1987)","journal-title":"IEEE Journal of Solid-State Circuits"},{"doi-asserted-by":"crossref","unstructured":"Yang, S., Greenstreet, M.R.: Simulating Improbable Events. In: ACM\/IEEE Design Automation Conference, pp. 154\u2013157 (2007)","key":"11_CR14","DOI":"10.1109\/DAC.2007.375143"},{"issue":"2","key":"11_CR15","doi-asserted-by":"publisher","first-page":"202","DOI":"10.1109\/4.982426","volume":"37","author":"D.J. Kinniment","year":"2002","unstructured":"Kinniment, D.J., Bystrov, A., Yakovlev, A.: Synchronization Circuit Performance. IEEE Journal of Solid-State Circuits\u00a037(2), 202\u2013209 (2002)","journal-title":"IEEE Journal of Solid-State Circuits"},{"doi-asserted-by":"crossref","unstructured":"Greenstreet, M.R.: Real-Time Merging. In: International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 186\u2013198 (1999)","key":"11_CR16","DOI":"10.1109\/ASYNC.1999.761533"},{"unstructured":"Nystroem, M., Martin, A.J.: Crossing the Synchronous-Asynchronous Divide. In: Workshop on Complexity-Effective Design (2002)","key":"11_CR17"},{"doi-asserted-by":"crossref","unstructured":"Fuchs, G., Fuegger, M., Steininger, A.: On the Threat of Metastability in an Asynchronous Fault-Tolerant Clock Generation Scheme. In: IEEE Symposium on Asynchronous Circuits and Systems, pp. 127\u2013136 (2009)","key":"11_CR18","DOI":"10.1109\/ASYNC.2009.15"},{"unstructured":"Mead, C., Conway, L.: Introduction to VLSI Systems. Addison-Wesley (1979)","key":"11_CR19"},{"doi-asserted-by":"crossref","unstructured":"Sparso, J., Furber, S.: Principles of Asynchronous Circuit Design - A Systems Perspective. Kluwer Academic Publishers (2001)","key":"11_CR20","DOI":"10.1007\/978-1-4757-3385-3"},{"doi-asserted-by":"crossref","unstructured":"Sutherland, I.E.: Micropipelines. Communications of the ACM 32(6), 720\u2013738 (1989)","key":"11_CR21","DOI":"10.1145\/63526.63532"},{"doi-asserted-by":"crossref","unstructured":"Shams, M., Ebergen, J.C., Elmasry, M.I.: A Comparison of CMOS Implementations of an Asynchronous Circuits Primitive: the C-Element. In: International Symposium on Low Power Electronics and Design, pp. 93\u201396 (1996)","key":"11_CR22","DOI":"10.1109\/LPE.1996.542737"},{"issue":"1","key":"11_CR23","doi-asserted-by":"publisher","first-page":"109","DOI":"10.1109\/TC.1987.5009455","volume":"C-36","author":"L. Kleeman","year":"1987","unstructured":"Kleeman, L., Cantoni, A.: On the Unavoidability of Metastable Behavior in Digital Systems. IEEE Transactions on Computers\u00a0C-36(1), 109\u2013112 (1987)","journal-title":"IEEE Transactions on Computers"}],"container-title":["Lecture Notes in Computer Science","Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-36157-9_11.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,5,4]],"date-time":"2021-05-04T09:35:47Z","timestamp":1620120947000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-36157-9_11"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013]]},"ISBN":["9783642361562","9783642361579"],"references-count":23,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-36157-9_11","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2013]]}}}