{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,9]],"date-time":"2024-09-09T16:27:22Z","timestamp":1725899242101},"publisher-location":"Berlin, Heidelberg","reference-count":27,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783642376573"},{"type":"electronic","value":"9783642376580"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013]]},"DOI":"10.1007\/978-3-642-37658-0_1","type":"book-chapter","created":{"date-parts":[[2013,4,5]],"date-time":"2013-04-05T10:20:22Z","timestamp":1365157222000},"page":"1-16","source":"Crossref","is-referenced-by-count":2,"title":["Just in Time Load Balancing"],"prefix":"10.1007","author":[{"given":"Rosario","family":"Cammarota","sequence":"first","affiliation":[]},{"given":"Alexandru","family":"Nicolau","sequence":"additional","affiliation":[]},{"given":"Alexander V.","family":"Veidenbaum","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"issue":"7","key":"1_CR1","doi-asserted-by":"publisher","first-page":"28","DOI":"10.1109\/2.869367","volume":"33","author":"J.L. Henning","year":"2000","unstructured":"Henning, J.L.: Spec cpu2000: Measuring cpu performance in the new millennium. IEEE Computer\u00a033(7), 28\u201335 (2000)","journal-title":"IEEE Computer"},{"issue":"4","key":"1_CR2","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/1186736.1186737","volume":"34","author":"J.L. Henning","year":"2006","unstructured":"Henning, J.L.: SPEC CPU2006 benchmark descriptions. SIGARCH Computer Architecture News\u00a034(4), 1\u201317 (2006)","journal-title":"SIGARCH Computer Architecture News"},{"key":"1_CR3","volume-title":"Advanced Computer Architecture","author":"S.F. Lundstrom","year":"1986","unstructured":"Lundstrom, S.F., Barnes, G.H.: A controllable MIMD architecture. In: Advanced Computer Architecture, IEEE Computer Society Press, Los Alamitos (1986)"},{"issue":"12","key":"1_CR4","doi-asserted-by":"publisher","first-page":"1425","DOI":"10.1109\/TC.1987.5009495","volume":"36","author":"C.D. Polychronopoulos","year":"1987","unstructured":"Polychronopoulos, C.D., Kuck, D.J.: Guided self-scheduling: A practical scheduling scheme for parallel supercomputers. IEEE Trans. Comput.\u00a036(12), 1425\u20131439 (1987)","journal-title":"IEEE Trans. Comput."},{"issue":"8","key":"1_CR5","doi-asserted-by":"publisher","first-page":"90","DOI":"10.1145\/135226.135232","volume":"35","author":"S. Hummel","year":"1992","unstructured":"Hummel, S., Schonberg, E., Flynn, L.E.: Factoring: a method for scheduling parallel loops. Commun. ACM\u00a035(8), 90\u2013101 (1992)","journal-title":"Commun. ACM"},{"key":"1_CR6","doi-asserted-by":"crossref","unstructured":"Lucco, S.: A dynamic scheduling technique for irregular parallel programs, pp. 200\u2013211 (1992)","DOI":"10.1145\/143103.143134"},{"issue":"1","key":"1_CR7","doi-asserted-by":"publisher","first-page":"87","DOI":"10.1109\/71.205655","volume":"4","author":"T.H. Tzen","year":"1993","unstructured":"Tzen, T.H., Ni, L.M.: Trapezoid self-scheduling: A practical scheduling scheme for parallel compilers. IEEE Trans. Parallel Distrib. Syst.\u00a04(1), 87\u201398 (1993)","journal-title":"IEEE Trans. Parallel Distrib. Syst."},{"key":"1_CR8","doi-asserted-by":"crossref","unstructured":"Yue, K.K., Lilja, D.J.: Parameter estimation for a generalized parallel loop scheduling algorithm. In: HICSS, p. 187 (1995)","DOI":"10.1201\/9781420050073.ch7"},{"key":"1_CR9","unstructured":"Hancock, D.J., Ford, R.W., Freeman, T.L., Bull, J.M.: An investigation of feedback guided dynamic scheduling of nested loops. In: Proceedings of the International Workshop on Parallel Processing (2000)"},{"key":"1_CR10","doi-asserted-by":"crossref","unstructured":"Kejariwal, A., Nicolau, A., Banerjee, U., Veidenbaum, A.V., Polychronopoulos, C.D.: Cache-aware partitioning of multi-dimensional iteration spaces. In: Proceedings of SYSTOR (2009)","DOI":"10.1145\/1534530.1534551"},{"key":"1_CR11","doi-asserted-by":"crossref","unstructured":"Williams, S., Waterman, A., Patterson, D.: Roofline: an insightful visual performance model for multicore architectures. Commun. ACM\u00a052(4) (2009)","DOI":"10.1145\/1498765.1498785"},{"key":"1_CR12","unstructured":"Openmp, \n                    \n                      http:\/\/www.openmp.org"},{"key":"1_CR13","unstructured":"Gnu gcc v4.6, \n                    \n                      http:\/\/gcc.gnu.org\/gcc-4.6\/"},{"key":"1_CR14","unstructured":"Intel compilers, \n                    \n                      http:\/\/software.intel.com\/en-us\/articles\/intel-compilers\/"},{"key":"1_CR15","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1007\/3-540-44587-0_1","volume-title":"OpenMP Shared Memory Parallel Programming","author":"V. Aslot","year":"2001","unstructured":"Aslot, V., Domeika, M., Eigenmann, R., Gaertner, G., Jones, W.B., Parady, B.: SPEComp: A New Benchmark Suite for Measuring Parallel Computer Performance. In: Eigenmann, R., Voss, M.J. (eds.) WOMPAT 2001. LNCS, vol.\u00a02104, pp. 1\u201310. Springer, Heidelberg (2001)"},{"key":"1_CR16","unstructured":"Zhang, Y., Voss, M.: Runtime empirical selection of loop schedulers on hyperthreaded smps. In: 19th International Parallel and Distributed Processing Symposium (2005)"},{"key":"1_CR17","doi-asserted-by":"publisher","first-page":"41","DOI":"10.1145\/563647.563656","volume":"29","author":"J.M. Bull","year":"2001","unstructured":"Bull, J.M., O\u2019Neill, D.: A microbenchmark suite for openmp 2.0. SIGARCH Comput. Archit. News\u00a029, 41\u201348 (2001)","journal-title":"SIGARCH Comput. Archit. News"},{"key":"1_CR18","unstructured":"Novillo, D.: Openmp and automatic parallelization in gcc. In: GCC Developers Summit (2006)"},{"key":"1_CR19","unstructured":"Mucci, P.J., Browne, S., Deane, C., Ho, G.: Papi: A portable interface to hardware performance counters. In: Proceedings of the Department of Defense HPCMP Users Group Conference, pp. 7\u201310 (1999)"},{"key":"1_CR20","unstructured":"Kernighan, B.W.: The C Programming Language, 2nd edn. Prentice Hall Professional Technical Reference (1988)"},{"key":"1_CR21","doi-asserted-by":"crossref","unstructured":"Pohl, T., Kowarschik, M., Wilke, J., Iglberger, K., R\u00fcde, U.: Optimization and profiling of the cache performance of parallel lattice boltzmann codes. Parallel Processing Letters\u00a013(4) (2003)","DOI":"10.1142\/S0129626403001501"},{"issue":"1","key":"1_CR22","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1016\/0167-8191(89)90003-3","volume":"12","author":"H.P. Flatt","year":"1989","unstructured":"Flatt, H.P., Kennedy, K.: Performance of parallel processors. Parallel Computing\u00a012(1), 1\u201320 (1989)","journal-title":"Parallel Computing"},{"key":"1_CR23","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"113","DOI":"10.1007\/3-540-07135-0_114","volume-title":"Parallel Processing","author":"L. Lamport","year":"1975","unstructured":"Lamport, L.: The Hyperplane Method for an Array Computer. In: Tse-Yun, F. (ed.) Parallel Processing. LNCS, vol.\u00a024, pp. 113\u2013131. Springer, Heidelberg (1975)"},{"key":"1_CR24","doi-asserted-by":"crossref","unstructured":"Banerjee, U.: Loop transformations for restructuring compilers - the foundations. Kluwer (1993)","DOI":"10.1007\/b102311"},{"key":"1_CR25","doi-asserted-by":"crossref","unstructured":"Kruskal, C.P., Weiss, A.: Allocating independent subtasks on parallel processors. IEEE Trans. Softw. Eng.\u00a011(10) (1985)","DOI":"10.1109\/TSE.1985.231547"},{"issue":"2","key":"1_CR26","doi-asserted-by":"publisher","first-page":"97","DOI":"10.1145\/857076.857077","volume":"35","author":"J. Aycock","year":"2003","unstructured":"Aycock, J.: A brief history of just-in-time. ACM Comput. Surv.\u00a035(2), 97\u2013113 (2003)","journal-title":"ACM Comput. Surv."},{"key":"1_CR27","doi-asserted-by":"crossref","unstructured":"Rauchwerger, L., Amato, N.M., Padua, D.A.: A scalable method for run-time loop parallelization. International Journal of Parallel Programming\u00a023(6) (1995)","DOI":"10.1007\/BF02577866"}],"container-title":["Lecture Notes in Computer Science","Languages and Compilers for Parallel Computing"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-37658-0_1","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,12]],"date-time":"2019-05-12T03:50:28Z","timestamp":1557633028000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-37658-0_1"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013]]},"ISBN":["9783642376573","9783642376580"],"references-count":27,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-37658-0_1","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2013]]}}}