{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,15]],"date-time":"2024-09-15T14:27:13Z","timestamp":1726410433627},"publisher-location":"Berlin, Heidelberg","reference-count":8,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783642420238"},{"type":"electronic","value":"9783642420245"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013]]},"DOI":"10.1007\/978-3-642-42024-5_20","type":"book-chapter","created":{"date-parts":[[2013,12,13]],"date-time":"2013-12-13T14:41:21Z","timestamp":1386945681000},"page":"160-168","source":"Crossref","is-referenced-by-count":0,"title":["Power Reduction by Integrated Within_Clock_Power Gating and Power Gating (WCPG_in_PG)"],"prefix":"10.1007","author":[{"given":"Debanjali","family":"Nath","sequence":"first","affiliation":[]},{"given":"Priyanka","family":"Choudhury","sequence":"additional","affiliation":[]},{"given":"Sambhu Nath","family":"Pradhan","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"20_CR1","doi-asserted-by":"crossref","unstructured":"Monteiro, J.C., Oliveira, A.L.: Finite State machine Decomposition for Low Power. In: Proc. of Design Automation Conference, pp. 758\u2013763 (1998)","DOI":"10.1145\/277044.277235"},{"key":"20_CR2","unstructured":"Kim, S., Kosonocky, S.V., Knebel, D.R., Stawiasz, K., Heidel, D., Immediato, M.: Minimizing Inductive Noise in System-On-a-Chip with Multiple Power Gating Structures. In: Proc. of the 29th European Solid-State Circuits Conference, pp. 635\u2013638 (2003)"},{"issue":"2","key":"20_CR3","first-page":"1793","volume":"2","author":"S.S. Gill","year":"2010","unstructured":"Gill, S.S., Chandel, R., Chandel, A.: Genetic Algorithm Based Approach to Circuit Partitioning. International Journal of Computer and Electrical Engineering\u00a02(2), 1793\u20138163 (2010)","journal-title":"International Journal of Computer and Electrical Engineering"},{"key":"20_CR4","doi-asserted-by":"crossref","unstructured":"Chaudhury, S., Rao, J.S., Chattopadhyay, S.: Synthesis of Finite State Machines for Low Power and Testability. In: IEEE APCCAS, Singapore, December 4-7 (2006)","DOI":"10.1109\/APCCAS.2006.342471"},{"key":"20_CR5","doi-asserted-by":"crossref","unstructured":"Kumar, M.T., Pradhan, S.N., Chattopadhyay, S.: Power-gated FSM Synthesis Integrating Partitioning and State Assignment. In: IEEE TENCON, Hyderabad, November 18-21 (2008)","DOI":"10.1109\/TENCON.2008.4766598"},{"key":"20_CR6","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1166\/jolpe.2012.1206","volume":"8","author":"P. Choudhury","year":"2012","unstructured":"Choudhury, P., Pradhan, S.N.: An Approach for Low Power Design of Power Gated Finite State Machines Considering Partitioning and State Encoding Together. Journal of Low Power Electronics\u00a08, 1\u201312 (2012)","journal-title":"Journal of Low Power Electronics"},{"key":"20_CR7","doi-asserted-by":"crossref","unstructured":"Mistry, J.N., Al-Hashimi, B.M., Flynn, D., Hill, S.: Sub-Clock Power-Gating Technique for Minimising Leakage Power During Active Mode. In: Design, Automation and Test in Europe, Grenoble, France, March 14-18. ACM\/IEEE (2011)","DOI":"10.1109\/DATE.2011.5763026"},{"key":"20_CR8","doi-asserted-by":"crossref","unstructured":"Pradhan, S.N., Nath, D., Choudhury, P., Nag, A.: Within-Clock Power Gating Architecture Implementation to Reduce Leakage. In: 5th International Conference on Computers and Devices for Communication (CODEC 2012), Kolkata, December 17-19 (2012)","DOI":"10.1109\/CODEC.2012.6509269"}],"container-title":["Communications in Computer and Information Science","VLSI Design and Test"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-42024-5_20","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,4]],"date-time":"2019-08-04T22:19:12Z","timestamp":1564957152000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-42024-5_20"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013]]},"ISBN":["9783642420238","9783642420245"],"references-count":8,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-42024-5_20","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"type":"print","value":"1865-0929"},{"type":"electronic","value":"1865-0937"}],"subject":[],"published":{"date-parts":[[2013]]}}}