{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T02:54:09Z","timestamp":1725764049867},"publisher-location":"Berlin, Heidelberg","reference-count":0,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783642420238"},{"type":"electronic","value":"9783642420245"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013]]},"DOI":"10.1007\/978-3-642-42024-5_7","type":"book-chapter","created":{"date-parts":[[2013,12,13]],"date-time":"2013-12-13T09:41:21Z","timestamp":1386927681000},"page":"49-58","source":"Crossref","is-referenced-by-count":2,"title":["An Area Efficient Wide Range On-Chip Delay Measurement Architecture"],"prefix":"10.1007","author":[{"given":"Rahul","family":"Krishnamurthy","sequence":"first","affiliation":[]},{"given":"G. K.","family":"Sharma","sequence":"additional","affiliation":[]}],"member":"297","container-title":["Communications in Computer and Information Science","VLSI Design and Test"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-42024-5_7","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2013,12,13]],"date-time":"2013-12-13T09:41:30Z","timestamp":1386927690000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-42024-5_7"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013]]},"ISBN":["9783642420238","9783642420245"],"references-count":0,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-42024-5_7","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"type":"print","value":"1865-0929"},{"type":"electronic","value":"1865-0937"}],"subject":[],"published":{"date-parts":[[2013]]}}}