{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,1]],"date-time":"2025-05-01T05:40:01Z","timestamp":1746078001808,"version":"3.40.4"},"publisher-location":"Berlin, Heidelberg","reference-count":7,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783642420238"},{"type":"electronic","value":"9783642420245"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013]]},"DOI":"10.1007\/978-3-642-42024-5_8","type":"book-chapter","created":{"date-parts":[[2013,12,13]],"date-time":"2013-12-13T14:41:21Z","timestamp":1386945681000},"page":"59-65","source":"Crossref","is-referenced-by-count":0,"title":["10 Gbps Current Mode Logic I\/O Buffer"],"prefix":"10.1007","author":[{"given":"Akhil","family":"Rathore","sequence":"first","affiliation":[]},{"given":"Chetan D","family":"Parikh","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"8_CR1","doi-asserted-by":"publisher","first-page":"1081","DOI":"10.1109\/TVLSI.2004.833663","volume":"12","author":"P. Heydari","year":"2004","unstructured":"Heydari, P., Mohanavelu, R.: Design of Ultrahigh -Speed Low Voltage CMOS CML Buffers and Latches. IEEE Trans. VLSI Syst.\u00a012, 1081\u20131093 (2004)","journal-title":"IEEE Trans. VLSI Syst."},{"key":"8_CR2","volume-title":"Design of Analog CMOS Integrated Circuits","author":"B. Razavi","year":"2001","unstructured":"Razavi, B.: Design of Analog CMOS Integrated Circuits. McGraw-Hill, New York (2001)"},{"doi-asserted-by":"crossref","unstructured":"Green, M.M., Singh, U.: Design of CMOS CML circuits for high speed broadband communications. In: Proc. Int. Symp. Circuits and Systems, pp. II-204\u2013II-207 (2003)","key":"8_CR3","DOI":"10.1109\/ISCAS.2003.1205937"},{"doi-asserted-by":"crossref","unstructured":"Tsuchiya, A., Kuboki, T., Onodera, H.: Low -Power Design of CML Drivers for On Chip Transmission Lines. IEICE Trans. Electron. E90-C, 1274\u20131281 (2007)","key":"8_CR4","DOI":"10.1093\/ietele\/e90-c.6.1274"},{"unstructured":"MOSIS Integrated Circuit Fabrication Service, http:\/\/www.mosis.org","key":"8_CR5"},{"unstructured":"Maxim Corporation, \u2018MAX3804 I\/O model 10Gbps equalizer\u2019 (2008), http:\/\/www.maximic.com\/tools\/spice\/fiber\/app_3804ete.pdf","key":"8_CR6"},{"key":"8_CR7","doi-asserted-by":"publisher","first-page":"2138","DOI":"10.1109\/JSSC.2003.818567","volume":"38","author":"S. Galal","year":"2003","unstructured":"Galal, S., Razavi, B.: 10 Gb\/s Limiting amplifier and laser\/modulator driver in 0.18 \u03bcm CMOS technology. IEEE J. Solid-State Circuits\u00a038, 2138\u20132146 (2003)","journal-title":"IEEE J. Solid-State Circuits"}],"container-title":["Communications in Computer and Information Science","VLSI Design and Test"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-642-42024-5_8","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,1]],"date-time":"2025-05-01T05:04:27Z","timestamp":1746075867000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-642-42024-5_8"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013]]},"ISBN":["9783642420238","9783642420245"],"references-count":7,"URL":"https:\/\/doi.org\/10.1007\/978-3-642-42024-5_8","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"type":"print","value":"1865-0929"},{"type":"electronic","value":"1865-0937"}],"subject":[],"published":{"date-parts":[[2013]]}}}