{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,16]],"date-time":"2025-05-16T04:08:27Z","timestamp":1747368507697,"version":"3.40.5"},"publisher-location":"Berlin, Heidelberg","reference-count":9,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783662462478"},{"type":"electronic","value":"9783662462485"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015]]},"DOI":"10.1007\/978-3-662-46248-5_53","type":"book-chapter","created":{"date-parts":[[2014,12,29]],"date-time":"2014-12-29T14:38:10Z","timestamp":1419863890000},"page":"439-447","source":"Crossref","is-referenced-by-count":0,"title":["An On-chip Interconnection QoS Verification Platform of Processor of Large Data for Architectural Modeling Analysis"],"prefix":"10.1007","author":[{"given":"Li","family":"Qinghua","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Qin","family":"Jilong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ding","family":"Xu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wang","family":"Endong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gong","family":"Weifeng","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"unstructured":"Dally, W.J., Towles, B.: Principles and Practices of Interconnection Networks. Morgan Kaufmann publications (2007)","key":"53_CR1"},{"doi-asserted-by":"crossref","unstructured":"Xiao, Y., Liu, L., Wei, S.: Design and implementation of Reconfigurable Stream Processor in multimedia applications. In: Communications, Circuits and Systems, ICCCAS 2008, May 25-27, pp. 1382\u20131386 (2008)","key":"53_CR2","DOI":"10.1109\/ICCCAS.2008.4658024"},{"unstructured":"Kumar, S., et al.: A Network on Chip Architecture and Design Methodology. In: Proc. ISVLSI 2002, pp. 105\u2013112 (April 2002)","key":"53_CR3"},{"unstructured":"International Technology Roadmap for Semiconductors (ITRS), 2003 edn, 2005 edn. Semiconductor Industry Association, San Jose, CA","key":"53_CR4"},{"unstructured":"Intel Thurley has Early CSI Interconnect. The Inquirer, http:\/\/www.theinquirer.net\/default.aspx?article=37392 (February 2, 2007)","key":"53_CR5"},{"unstructured":"Borkar, S.: Networks for multi-core chip - A controversial view. In: 2006 Workshop on On- and Off-chip interconnection Networks for Multicore Systems, OCIN (December 2, 2006)","key":"53_CR6"},{"issue":"1","key":"53_CR7","doi-asserted-by":"publisher","first-page":"42","DOI":"10.1109\/92.486080","volume":"4","author":"M. Srivastava","year":"1996","unstructured":"Srivastava, M., Chandrakasan, A., Brodersen, R.: Predictive system shutdown and other architectural techniques for energy efficient programmable computation. IEEE Trans. on VLSI System\u00a04(1), 42\u201355 (1996)","journal-title":"IEEE Trans. on VLSI System"},{"doi-asserted-by":"crossref","unstructured":"Wentzlaff, D., et al.: On-chip Interconnection Architecture of Tile Processor. IEEE Micro., 15\u201331 (September 2007)","key":"53_CR8","DOI":"10.1109\/MM.2007.4378780"},{"doi-asserted-by":"crossref","unstructured":"Park, C., Badeau, R., et al.: A 1.2TB\/s on-chip ring interconnection for 45nm 8-core enterprise Xeon processor. In: 2010 IEEE International Solid-State Circuit Conference Digest of Technical Paper (ISSCC), pp. 180\u2013181 (February 2010)","key":"53_CR9","DOI":"10.1109\/ISSCC.2010.5434000"}],"container-title":["Communications in Computer and Information Science","Intelligent Computation in Big Data Era"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-662-46248-5_53","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,15]],"date-time":"2025-05-15T16:20:44Z","timestamp":1747326044000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-662-46248-5_53"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015]]},"ISBN":["9783662462478","9783662462485"],"references-count":9,"URL":"https:\/\/doi.org\/10.1007\/978-3-662-46248-5_53","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"type":"print","value":"1865-0929"},{"type":"electronic","value":"1865-0937"}],"subject":[],"published":{"date-parts":[[2015]]}}}