{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,24]],"date-time":"2025-06-24T17:40:06Z","timestamp":1750786806127,"version":"3.41.0"},"publisher-location":"Singapore","reference-count":37,"publisher":"Springer Singapore","isbn-type":[{"type":"print","value":"9789811054266"},{"type":"electronic","value":"9789811054273"}],"license":[{"start":{"date-parts":[[2017,1,1]],"date-time":"2017-01-01T00:00:00Z","timestamp":1483228800000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017]]},"DOI":"10.1007\/978-981-10-5427-3_45","type":"book-chapter","created":{"date-parts":[[2017,7,21]],"date-time":"2017-07-21T09:43:15Z","timestamp":1500630195000},"page":"423-432","source":"Crossref","is-referenced-by-count":0,"title":["A Novel Ultra Low Power Current Comparator"],"prefix":"10.1007","author":[{"given":"Veepsa","family":"Bhatia","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Neeta","family":"Pandey","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2017,7,22]]},"reference":[{"key":"45_CR1","first-page":"415","volume":"22","author":"F Khateb","year":"2013","unstructured":"Khateb, F., Dabbous, S.B.A., Vlassis, S.: A survey of non-conventional techniques or low-voltage low-power analog circuit design. Radioengineering 22, 415\u2013427 (2013)","journal-title":"Radioengineering"},{"key":"45_CR2","unstructured":"Yan, S., Sanchez-Sinencio, E.: Low voltage analog circuit design techniques: a tutorial. IEICE Trans. Analog Integr. Circ. Syst. E00-A(2) (2000)"},{"key":"45_CR3","doi-asserted-by":"crossref","first-page":"1010","DOI":"10.1016\/j.mejo.2011.05.001","volume":"42","author":"F Khateb","year":"2011","unstructured":"Khateb, F., Khatib, N., Koton, J.: Novel low-voltage ultra-low power DVCC based on floating-gate folded cascade OTA. Microelectron. J. 42, 1010\u20131017 (2011)","journal-title":"Microelectron. J."},{"key":"45_CR4","first-page":"723","volume":"27","author":"E Farshidi","year":"2014","unstructured":"Farshidi, E., Keramatzadeh, A.: A new approach for low voltage CMOS based on current-controlled conveyors. IJE Trans. B: Appl. 27, 723\u2013730 (2014)","journal-title":"IJE Trans. B: Appl."},{"key":"45_CR5","doi-asserted-by":"crossref","first-page":"434","DOI":"10.1109\/JSSC.2003.822782","volume":"39","author":"J Ramirez-Angulo","year":"2003","unstructured":"Ramirez-Angulo, J., Lopez-Martin, A.J., Carvajal, R.G., Chavero, F.M.: Very low-volatge analog signal processing based on quasi-floating gate transistors. IEEE J. Solid-State Circ. 39, 434\u2013442 (2003)","journal-title":"IEEE J. Solid-State Circ."},{"key":"45_CR6","first-page":"303","volume":"26","author":"M Fallah","year":"2013","unstructured":"Fallah, M., MiarNaimi, H.: A novel low voltage, low power and high gain operational amplifier using negative resistance and self cascode transistors. IJE Trans. C: Aspects 26, 303\u2013308 (2013)","journal-title":"IJE Trans. C: Aspects"},{"key":"45_CR7","doi-asserted-by":"crossref","first-page":"414","DOI":"10.1109\/16.556151","volume":"44","author":"F Assaderaghi","year":"1997","unstructured":"Assaderaghi, F., Sinitsky, D., Parke, S.A., et al.: Dynamic threshold-voltage MOSFET (DTMOS) for ultra-low-voltage VLSI. IEEE Trans. Electron Devices 44, 414\u2013422 (1997)","journal-title":"IEEE Trans. Electron Devices"},{"key":"45_CR8","doi-asserted-by":"crossref","first-page":"510","DOI":"10.1109\/55.338420","volume":"15","author":"F Assaderaghi","year":"1994","unstructured":"Assaderaghi, F., Parke, S.A., Sinitskyd, D., Bokor, J., Ko, P.K., Hu, C.: Dynamic threshold-voltage MOSFET (DTMOS) for very low-voltage operation. IEEE Device Lett. 15, 510\u2013512 (1994)","journal-title":"IEEE Device Lett."},{"key":"45_CR9","doi-asserted-by":"crossref","first-page":"1151","DOI":"10.1109\/TVLSI.2006.884174","volume":"14","author":"M Maymandi-Nejad","year":"2006","unstructured":"Maymandi-Nejad, M., Sachdev, M.: DTMOS Technique for low-voltage analog circuits. IEEE Trans. Very Large Scale Integr. VLSI Syst. 14, 1151\u20131156 (2006)","journal-title":"IEEE Trans. Very Large Scale Integr. VLSI Syst."},{"key":"45_CR10","doi-asserted-by":"crossref","unstructured":"Li, Z., Yu, M., Ma, J.: A novel input stage based on DTMOS for low-voltage low-noise operational amplifier. In: IEEE Asia Pacific Conference on Circuits and Systems, pp. 1591\u20131594 (2006)","DOI":"10.1109\/APCCAS.2006.342549"},{"key":"45_CR11","unstructured":"Achigui, H.F., Fayomi, C.J.B., Sawan, M.A.: 1-V low-power low-noise DTMOS based class AB opamp, In: The 3rd International IEEE-NEWCAS Conference, pp. 307\u2013310 (2005)"},{"key":"45_CR12","doi-asserted-by":"crossref","unstructured":"Shen, E., Kuo, J.B.: A novel 0.8\u00a0V BP-DTMOS content addressable memory cell circuit derived from SOI-DTMOS techniques. In: Proceedings of IEEE Conference on Electron Devices and Solid-State Circuits, pp. 243\u2013245 (2003)","DOI":"10.1109\/EDSSC.2003.1283523"},{"key":"45_CR13","doi-asserted-by":"crossref","unstructured":"Liu, J., Han, Y., Xie, L., Wang, Y., Wen, G.: A 1-V DTMOS-based fully differential telescopic OTA. In: Proceedings of IEEE Asia Pacific Conference on Circuits and Systems, pp. 49\u201352 (2014)","DOI":"10.1109\/APCCAS.2014.7032716"},{"key":"45_CR14","doi-asserted-by":"crossref","unstructured":"Chouhan, S.S., Halonen, K.: The DTMOS based UHF RF to DC conversion. In: IEEE 20th International Conference on Electronics, Circuits, and Systems, pp. 629\u2013632 (2013)","DOI":"10.1109\/ICECS.2013.6815493"},{"key":"45_CR15","doi-asserted-by":"crossref","unstructured":"Chouhan, S.S., Halonen, K.: The design and implementation of DTMOS biased all PMOS rectifier for RF energy harvesting. In: IEEE 12th International Conference on New Circuits and Systems, pp. 444\u2013447 (2014)","DOI":"10.1109\/NEWCAS.2014.6934078"},{"key":"45_CR16","doi-asserted-by":"crossref","first-page":"695","DOI":"10.1049\/el:19830474","volume":"19","author":"OA Freitas","year":"1993","unstructured":"Freitas, O.A., Current, K.W.: CMOS current comparator circuit. Electron. Lett. 19, 695\u2013697 (1993)","journal-title":"Electron. Lett."},{"key":"45_CR17","doi-asserted-by":"crossref","first-page":"310","DOI":"10.1049\/el:19920192","volume":"28","author":"H Traff","year":"1992","unstructured":"Traff, H.: Novel approach to high speed CMOS current comparators. Electron. Lett. 28, 310\u2013312 (1992)","journal-title":"Electron. Lett."},{"key":"45_CR18","doi-asserted-by":"crossref","first-page":"5","DOI":"10.1049\/el:19940003","volume":"30","author":"ATK Tang","year":"1994","unstructured":"Tang, A.T.K., Toumazou, C.: High performance CMOS current comparator. Electron. Lett. 30, 5\u20136 (1994)","journal-title":"Electron. Lett."},{"key":"45_CR19","doi-asserted-by":"crossref","first-page":"2074","DOI":"10.1049\/el:19981411","volume":"34","author":"BM Min","year":"1998","unstructured":"Min, B.M., Kim, S.W.: High performance CMOS current comparator using resistive feedback network. Electron. Lett. 34, 2074\u20132076 (1998)","journal-title":"Electron. Lett."},{"key":"45_CR20","doi-asserted-by":"crossref","first-page":"293","DOI":"10.1023\/A:1011260111919","volume":"28","author":"L Chen","year":"2001","unstructured":"Chen, L., Shi, B., Lu, C.: Circuit design of a high speed and low power CMOS continuous-time current comparator. Analog Integr. Circ. Sig. Process 28, 293\u2013297 (2001)","journal-title":"Analog Integr. Circ. Sig. Process"},{"issue":"6","key":"45_CR21","doi-asserted-by":"crossref","first-page":"1549","DOI":"10.1093\/ietfec\/e88-a.6.1549","volume":"E88-A","author":"V Kasemsuwan","year":"2005","unstructured":"Kasemsuwan, V., Khucharoensin, S.: High speed low input impedance CMOS current comparator. IEEE Trans. Fundam. E88-A(6), 1549\u20131553 (2005)","journal-title":"IEEE Trans. Fundam."},{"key":"45_CR22","doi-asserted-by":"crossref","first-page":"949","DOI":"10.1016\/j.aeue.2011.03.008","volume":"65","author":"R Chavoshiani","year":"2011","unstructured":"Chavoshiani, R., Hashempour, O.: Differential current conveyor based current comparator. Int. J. Electron. Commun. (AE\u00dc) 65, 949\u2013953 (2011)","journal-title":"Int. J. Electron. Commun. (AE\u00dc)"},{"key":"45_CR23","doi-asserted-by":"crossref","first-page":"28","DOI":"10.1016\/j.mejo.2010.09.007","volume":"42","author":"R Chavoshiani","year":"2011","unstructured":"Chavoshiani, R., Hashempour, O.: A high-speed current conveyor based current comparator. Microelectron. J. 42, 28\u201332 (2011)","journal-title":"Microelectron. J."},{"issue":"20","key":"45_CR24","doi-asserted-by":"crossref","first-page":"1007","DOI":"10.1049\/el.2009.1419","volume":"45","author":"X Tang","year":"2009","unstructured":"Tang, X., Pun, K.P.: High performance CMOS current comparator. Electron. Lett. 45(20), 1007\u20131009 (2009)","journal-title":"Electron. Lett."},{"key":"45_CR25","doi-asserted-by":"crossref","unstructured":"Dominguez-Castro, R., Rodriguez-Vazquez, A., Medeiro, F., Huertas, J.L.: High resolution CMOS current comparators. In: Eighteenth European Solid State Circuits Conference, Denmark, pp. 242\u2013245 (1992)","DOI":"10.1109\/ESSCIRC.1992.5468214"},{"key":"45_CR26","doi-asserted-by":"crossref","first-page":"1829","DOI":"10.1049\/el:19971250","volume":"33","author":"L Ravezzi","year":"1997","unstructured":"Ravezzi, L., Stoppa, D., Dallabetta, G.F.: Simple high-speed CMOS current comparator. Electron. Lett. 33, 1829\u20131830 (1997)","journal-title":"Electron. Lett."},{"key":"45_CR27","doi-asserted-by":"crossref","first-page":"171","DOI":"10.1049\/el:20083145","volume":"44","author":"D Banks","year":"2008","unstructured":"Banks, D., Toumazou, C.: Low-power high-speed current comparator design. Electron. Lett. 44, 171\u2013172 (2008)","journal-title":"Electron. Lett."},{"key":"45_CR28","unstructured":"Fernandez, R., Cembrano, G., Castro, R., Vazquez, A.: A mismatch-insensitive high-accuracy high-speed continuous - time current comparator in low voltage CMOS. In: IEEE Proceedings of the Analog and Mixed Signal IC Design, pp. 303\u2013306 (1997)"},{"key":"45_CR29","doi-asserted-by":"crossref","first-page":"740","DOI":"10.1109\/LED.2005.856011","volume":"26","author":"MS Shieh","year":"2005","unstructured":"Shieh, M.S., Chen, P.S., Tsai, M.J., Lei, T.F.: A novel dynamic threshold voltage MOSFET (DTMOS) using heterostructure channel of Si1 yCy interlayer. IEEE Electron Device Lett. 26, 740\u2013742 (2005)","journal-title":"IEEE Electron Device Lett."},{"key":"45_CR30","unstructured":"Kang, S.M., Leblebici, Y.: CMOS Digital Integrated Circuits: Analysis and Design. TMH, (2008)"},{"key":"45_CR31","doi-asserted-by":"crossref","unstructured":"Assaderaghi, F.: DTMOS: its derivatives and variations, and their potential applications. In: The 12th International Conference on Microelectronics, pp. 9\u201310 (2002)","DOI":"10.1109\/ICM.2000.916403"},{"key":"45_CR32","volume-title":"Operation and Modeling of the MOS Transistor","author":"YP Tsividis","year":"1987","unstructured":"Tsividis, Y.P.: Operation and Modeling of the MOS Transistor. Mc-Graw Hill, New York (1987)"},{"key":"45_CR33","volume-title":"Microelectronics Circuits","author":"A Sedra","year":"1998","unstructured":"Sedra, A., Smith, K.: Microelectronics Circuits. Oxford University Press, Oxford (1998)"},{"key":"45_CR34","doi-asserted-by":"crossref","first-page":"97","DOI":"10.1007\/s10470-008-9241-2","volume":"59","author":"M Gupta","year":"2009","unstructured":"Gupta, M., Aggarwal, P., Singh, P., Jindal, N.K.: Low voltage current mirrors with enhanced bandwidth. Analog Integr. Circuits Sig. Process. 59, 97\u2013103 (2009)","journal-title":"Analog Integr. Circuits Sig. Process."},{"key":"45_CR35","doi-asserted-by":"publisher","unstructured":"Sridhar, R., Pandey, N., Bhatia, V., Bhattacharyya, A.: High speed high resolution current comparator and its application to analog to digital converter. Springer J. Inst. Eng. India, Ser. B, 2250\u20132106 (2015). doi: 10.1007\/s40031-015-0189-1","DOI":"10.1007\/s40031-015-0189-1"},{"key":"45_CR36","doi-asserted-by":"crossref","unstructured":"Sridhar, R., Pandey, N., Bhatia, V., Bhattacharyya, A.: On improving the performance of Traff\u2019s comparator. In: IEEE 5th India International Conference on Power Electronics, pp. 1\u20134 (2012)","DOI":"10.1109\/IICPE.2012.6450418"},{"key":"45_CR37","doi-asserted-by":"crossref","unstructured":"Uygur, A., Kuntman, H.: An ultra low-voltage, ultra low- power DTMOS-based CCII design for speech processing filters. In: The 8th International Conference on Electrical and Electronics Engineering, pp. 31\u201335 (2013)","DOI":"10.1109\/ELECO.2013.6713930"}],"container-title":["Communications in Computer and Information Science","Advances in Computing and Data Sciences"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-981-10-5427-3_45","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,24]],"date-time":"2025-06-24T17:05:28Z","timestamp":1750784728000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-981-10-5427-3_45"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017]]},"ISBN":["9789811054266","9789811054273"],"references-count":37,"URL":"https:\/\/doi.org\/10.1007\/978-981-10-5427-3_45","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"type":"print","value":"1865-0929"},{"type":"electronic","value":"1865-0937"}],"subject":[],"published":{"date-parts":[[2017]]}}}