{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,25]],"date-time":"2025-03-25T14:45:10Z","timestamp":1742913910496,"version":"3.40.3"},"publisher-location":"Singapore","reference-count":16,"publisher":"Springer Singapore","isbn-type":[{"type":"print","value":"9789811078439"},{"type":"electronic","value":"9789811078446"}],"license":[{"start":{"date-parts":[[2018,1,1]],"date-time":"2018-01-01T00:00:00Z","timestamp":1514764800000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018]]},"DOI":"10.1007\/978-981-10-7844-6_3","type":"book-chapter","created":{"date-parts":[[2018,1,2]],"date-time":"2018-01-02T05:42:22Z","timestamp":1514871742000},"page":"22-34","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["ACCDSE: A Design Space Exploration Framework for Convolutional Neural Network Accelerator"],"prefix":"10.1007","author":[{"given":"Zhisheng","family":"Li","sequence":"first","affiliation":[]},{"given":"Lei","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Qiang","family":"Dou","sequence":"additional","affiliation":[]},{"given":"Yuxing","family":"Tang","sequence":"additional","affiliation":[]},{"given":"Shasha","family":"Guo","sequence":"additional","affiliation":[]},{"given":"Haifang","family":"Zhou","sequence":"additional","affiliation":[]},{"given":"Wenyuan","family":"Lu","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2018,1,3]]},"reference":[{"issue":"10","key":"3_CR1","doi-asserted-by":"publisher","first-page":"1537","DOI":"10.1109\/TCAD.2015.2474396","volume":"34","author":"F Akopyan","year":"2015","unstructured":"Akopyan, F., Sawada, J., Cassidy, A., Alvarez-Icaza, R.: Truenorth: design and tool flow of a 65 mw 1 million neuron programmable neurosynaptic chip. IEEE Trans. Comput. Aided Des. Integr. Circ. Syst. 34(10), 1537\u20131557 (2015)","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circ. Syst."},{"key":"3_CR2","doi-asserted-by":"crossref","unstructured":"Alwani, M., Chen, H., Ferdman, M., Milder, P.: Fused-layer CNN accelerators. In: 2016 49th Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO), pp. 1\u201312, October 2016","DOI":"10.1109\/MICRO.2016.7783725"},{"key":"3_CR3","doi-asserted-by":"crossref","unstructured":"Chen, T., Du, Z., Sun, N., Wang, J., Wu, C., Chen, Y., Temam, O.: Diannao: a small-footprint high-throughput accelerator for ubiquitous machine-learning. In: International Conference on Architectural Support for Programming Languages and Operating Systems, pp. 269\u2013284 (2014)","DOI":"10.1145\/2644865.2541967"},{"key":"3_CR4","doi-asserted-by":"crossref","unstructured":"Du, Z., Fasthuber, R., Chen, T., Ienne, P., Li, L., Luo, T., Feng, X., Chen, Y., Temam, O.: Shidiannao: shifting vision processing closer to the sensor. In: Proceedings of the International Symposium on Computer Architecture, ISCA 2015, pp. 92\u2013104 (2015)","DOI":"10.1145\/2872887.2750389"},{"key":"3_CR5","doi-asserted-by":"crossref","unstructured":"Farabet, C., Poulet, C., Han, J.Y., Lecun, Y.: CNP: an FPGA-based processor for convolutional networks. In: International Conference on Field Programmable Logic and Applications, pp. 32\u201337 (2009)","DOI":"10.1109\/FPL.2009.5272559"},{"key":"3_CR6","unstructured":"Gupta, S., Agrawal, A., Gopalakrishnan, K., Narayanan, P.: Deep learning with limited numerical precision. Computer Science (2015)"},{"key":"3_CR7","doi-asserted-by":"crossref","unstructured":"Han, S., Liu, X., Mao, H., Pu, J., Pedram, A., Horowitz, M.A., Dally, W.J.: EIE: efficient inference engine on compressed deep neural network. In: International Symposium on Computer Architecture, pp. 243\u2013254 (2016)","DOI":"10.1145\/3007787.3001163"},{"key":"3_CR8","doi-asserted-by":"crossref","unstructured":"Ji, Y., Zhang, Y.H., Li, S.C., Chi, P., Jiang, C.H., Qu, P., Xie, Y., Chen, W.G.: Neutrams: neural network transformation and co-design under neuromorphic hardware constraints. In: The IEEE\/ACM International Symposium on Microarchitecture, pp. 1\u201313 (2016)","DOI":"10.1109\/MICRO.2016.7783724"},{"key":"3_CR9","doi-asserted-by":"crossref","unstructured":"Meloni, P., Deriu, G., Conti, F., Loi, I., Raffo, L., Benini, L.: Curbing the roofline: a scalable and flexible architecture for CNNS on FPGA. In: The ACM International Conference, pp. 376\u2013383 (2016)","DOI":"10.1145\/2903150.2911715"},{"key":"3_CR10","doi-asserted-by":"crossref","unstructured":"Motamedi, M., Gysel, P., Akella, V., Ghiasi, S.: Design space exploration of FPGA-based deep convolutional neural networks. In: Asia and South Pacific Design Automation Conference, pp. 575\u2013580 (2016)","DOI":"10.1109\/ASPDAC.2016.7428073"},{"key":"3_CR11","doi-asserted-by":"crossref","unstructured":"Peemen, M., Setio, A., Mesman, B., Corporaal, H.: Memory-centric accelerator design for Convolutional Neural Networks (2013)","DOI":"10.1109\/ICCD.2013.6657019"},{"key":"3_CR12","doi-asserted-by":"crossref","unstructured":"Reagen, B., Whatmough, P., Adolf, R., Rama, S., Lee, H., Lee, S.K., Jos Ndez-Lobato, M., Wei, G.Y., Brooks, D.: Minerva: enabling low-power, highly-accurate deep neural network accelerators. In: ACM\/IEEE International Symposium on Computer Architecture, pp. 267\u2013278 (2016)","DOI":"10.1145\/3007787.3001165"},{"key":"3_CR13","doi-asserted-by":"crossref","unstructured":"Shen, Y., Ferdman, M., Milder, P.: Overcoming resource underutilization in spatial CNN accelerators (2016)","DOI":"10.1109\/FPL.2016.7577315"},{"key":"3_CR14","doi-asserted-by":"crossref","unstructured":"Wang, C., Gong, L., Yu, Q., Li, X.: DLAU: a scalable deep learning accelerator unit on FPGA (2016)","DOI":"10.1109\/TCAD.2016.2587683"},{"key":"3_CR15","doi-asserted-by":"crossref","unstructured":"Zhang, C., Fang, Z., Zhou, P., Pan, P., Cong, J.: Caffeine: towards uniformed representation and acceleration for deep convolutional neural networks. In: International Conference on Computer Aided Design (2016)","DOI":"10.1145\/2966986.2967011"},{"key":"3_CR16","doi-asserted-by":"crossref","unstructured":"Zhang, C., Li, P., Sun, G., Guan, Y., Xiao, B., Cong, J.: Optimizing FPGA-based accelerator design for deep convolutional neural networks. In: ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays, pp. 161\u2013170 (2015)","DOI":"10.1145\/2684746.2689060"}],"container-title":["Communications in Computer and Information Science","Computer Engineering and Technology"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-981-10-7844-6_3","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,2,19]],"date-time":"2021-02-19T04:31:01Z","timestamp":1613709061000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-981-10-7844-6_3"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018]]},"ISBN":["9789811078439","9789811078446"],"references-count":16,"URL":"https:\/\/doi.org\/10.1007\/978-981-10-7844-6_3","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"type":"print","value":"1865-0929"},{"type":"electronic","value":"1865-0937"}],"subject":[],"published":{"date-parts":[[2018]]},"assertion":[{"value":"3 January 2018","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"NCCET","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"CCF National Conference on Computer Engineering and Technology","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Xiamen","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"China","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2017","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"16 August 2017","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"18 August 2017","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"21","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"nccet2017","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"http:\/\/www.nccet.cn","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}}]}}