{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,7]],"date-time":"2025-07-07T01:10:04Z","timestamp":1751850604552,"version":"3.41.0"},"publisher-location":"Singapore","reference-count":9,"publisher":"Springer Singapore","isbn-type":[{"type":"print","value":"9789811322020"},{"type":"electronic","value":"9789811322037"}],"license":[{"start":{"date-parts":[[2018,1,1]],"date-time":"2018-01-01T00:00:00Z","timestamp":1514764800000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018]]},"DOI":"10.1007\/978-981-13-2203-7_40","type":"book-chapter","created":{"date-parts":[[2018,9,8]],"date-time":"2018-09-08T10:33:22Z","timestamp":1536402802000},"page":"505-511","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["Dual-Issue CGRA for DAG Acceleration"],"prefix":"10.1007","author":[{"given":"Li","family":"Zhou","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jianfeng","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hengzhu","family":"Liu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2018,9,9]]},"reference":[{"issue":"3","key":"40_CR1","doi-asserted-by":"publisher","first-page":"161","DOI":"10.1016\/j.micpro.2008.10.003","volume":"33","author":"A Zainul","year":"2009","unstructured":"Zainul, A., Svensson, B.: Evolution in architectures and programming methodologies of coarse-grained reconfigurable computing. Microprocess. Microsyst. 33(3), 161\u2013178 (2009)","journal-title":"Microprocess. Microsyst."},{"issue":"12","key":"40_CR2","doi-asserted-by":"publisher","first-page":"1978","DOI":"10.1109\/TCAD.2017.2682645","volume":"36","author":"O Sangyun","year":"2017","unstructured":"Sangyun, O., Hongsik, L., Jongeun, L.: Efficient execution of stream graphs on coarse-grained reconfigurable architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(12), 1978\u20131988 (2017)","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circuits Syst."},{"key":"40_CR3","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1109\/TVLSI.2017.2752963","volume":"26","author":"F Xitian","year":"2018","unstructured":"Xitian, F., Di, W., Wei, C., Wayne, L., Lingli, W.: Stream processing dual-track CGRA for object inference. IEEE Trans. Very Larg. Scale Integr. (VLSI) Syst. 26, 1\u201314 (2018)","journal-title":"IEEE Trans. Very Larg. Scale Integr. (VLSI) Syst."},{"key":"40_CR4","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1155\/2013\/683615","volume":"2013","author":"A Chattopadhyay","year":"2013","unstructured":"Chattopadhyay, A.: Ingredients of adaptability: a survey of reconfigurable processors. VLSI Design 2013, 1\u201318 (2013)","journal-title":"VLSI Design"},{"doi-asserted-by":"crossref","unstructured":"Hamzeh, M., Shrivastava, A., Sarma, B.K.: Branch-aware loop mapping on CGRAs. In: Proceedings of 2014 Design Automation Conference (DAC), pp. 1\u20136. IEEE, San Francisco (2014)","key":"40_CR5","DOI":"10.1109\/DAC.2014.6881434"},{"doi-asserted-by":"crossref","unstructured":"Tajas, R., Lukas, J., Dennis, W., Christian, H.: Scheduler for inhomogeneous and irregular CGRAs with support for complex control flow. In: Proceedings of 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, pp. 198\u2013207 (2016)","key":"40_CR6","DOI":"10.1109\/IPDPSW.2016.72"},{"doi-asserted-by":"crossref","unstructured":"Radhika, S.H.R., Shrivastava, A., Hamzeh, M.: Path selection based acceleration of conditionals in CGRAs. In: Proceedings of 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 121\u2013126. IEEE, Grenoble (2015)","key":"40_CR7","DOI":"10.7873\/DATE.2015.0788"},{"key":"40_CR8","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"219","DOI":"10.1007\/978-3-642-36812-7_22","volume-title":"Reconfigurable Computing: Architectures, Tools and Applications","author":"L Zhou","year":"2013","unstructured":"Zhou, L., Liu, D., Zhang, B., Liu, H.: Ant colony optimization for application mapping in coarse-grained reconfigurable array. In: Brisk, P., de Figueiredo Coutinho, J.G., Diniz, P.C. (eds.) ARC 2013. LNCS, vol. 7806, p. 219. Springer, Heidelberg (2013). https:\/\/doi.org\/10.1007\/978-3-642-36812-7_22"},{"issue":"4","key":"40_CR9","doi-asserted-by":"publisher","first-page":"345","DOI":"10.1023\/A:1020936909085","volume":"3","author":"D Merkle","year":"2002","unstructured":"Merkle, D., Middendorf, M.: Fast ant colony optimization on runtime reconfigurable processor arrays. Genet. Progr. Evol. Mach. 3(4), 345\u2013361 (2002)","journal-title":"Genet. Progr. Evol. Mach."}],"container-title":["Communications in Computer and Information Science","Data Science"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-981-13-2203-7_40","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,7]],"date-time":"2025-07-07T00:44:41Z","timestamp":1751849081000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-981-13-2203-7_40"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018]]},"ISBN":["9789811322020","9789811322037"],"references-count":9,"URL":"https:\/\/doi.org\/10.1007\/978-981-13-2203-7_40","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"type":"print","value":"1865-0929"},{"type":"electronic","value":"1865-0937"}],"subject":[],"published":{"date-parts":[[2018]]},"assertion":[{"value":"9 September 2018","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"ICPCSEE","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Conference of Pioneering Computer Scientists, Engineers and Educators","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Zhengzhou","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"China","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2018","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"21 September 2018","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"23 September 2018","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"ICPCSEE 2018","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}}]}}