{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,24]],"date-time":"2026-03-24T15:49:37Z","timestamp":1774367377231,"version":"3.50.1"},"publisher-location":"Singapore","reference-count":12,"publisher":"Springer Singapore","isbn-type":[{"value":"9789811359491","type":"print"},{"value":"9789811359507","type":"electronic"}],"license":[{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019]]},"DOI":"10.1007\/978-981-13-5950-7_55","type":"book-chapter","created":{"date-parts":[[2019,1,24]],"date-time":"2019-01-24T21:31:33Z","timestamp":1548365493000},"page":"670-681","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":2,"title":["An Angular Steiner Tree Based Global Routing Algorithm for Graphene Nanoribbon Circuit"],"prefix":"10.1007","author":[{"given":"Arindam","family":"Sinharay","sequence":"first","affiliation":[]},{"given":"Subrata","family":"Das","sequence":"additional","affiliation":[]},{"given":"Pranab","family":"Roy","sequence":"additional","affiliation":[]},{"given":"Hafizur","family":"Rahaman","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2019,1,25]]},"reference":[{"key":"55_CR1","doi-asserted-by":"crossref","unstructured":"Yan, T., Ma, Q., Chistedt, S., Wong, M.D.F., Chen, D.: Routing for graphene nanoribbons. In: Proceedings of the 16th Asia and South Pacific Design Automation Conference. IEEE, pp. 323\u2013329 (2011)","DOI":"10.1109\/ASPDAC.2011.5722208"},{"issue":"4","key":"55_CR2","doi-asserted-by":"publisher","first-page":"61:1","DOI":"10.1145\/2505056","volume":"18","author":"T Yan","year":"2013","unstructured":"Yan, T., Ma, Q., Chistedt, S., Wong, M.D.F., Chen, D.: A routing algorithm for graphene nanoribbon circuit. ACM Trans. Des. Autom. Electron. Syst. 18(4), 61:1\u201361:18 (2013). Article-61","journal-title":"ACM Trans. Des. Autom. Electron. Syst."},{"key":"55_CR3","doi-asserted-by":"crossref","unstructured":"Ragheb, T., Massoud, Y.: On the modeling of resistance in graphene nanoribbon (GNR) for future interconnect applications. In: IEEE\/ACM International Conference on Computer-Aided Design, pp. 593\u2013597 (2008)","DOI":"10.1109\/ICCAD.2008.4681637"},{"key":"55_CR4","doi-asserted-by":"crossref","unstructured":"Xu, C., Li, H., Banerjee, K.: Graphene Nano-Ribbon (GNR) interconnects: a genuine contender or a delusive dream? In: IEEE International Electron Devices Meeting (IEDM 2008) (2008)","DOI":"10.1109\/IEDM.2008.4796651"},{"issue":"11","key":"55_CR5","doi-asserted-by":"publisher","first-page":"3137","DOI":"10.1109\/TED.2010.2069562","volume":"57","author":"X Chen","year":"2010","unstructured":"Chen, X., et al.: Fully integrated graphene and carbon nanotube interconnects for gigahertz high-speed CMOS electronics. IEEE Trans. Electron Devices 57(11), 3137\u20133143 (2010)","journal-title":"IEEE Trans. Electron Devices"},{"issue":"11","key":"55_CR6","doi-asserted-by":"publisher","first-page":"23293","DOI":"10.1364\/OE.25.023293","volume":"2","author":"PD Anderson","year":"2017","unstructured":"Anderson, P.D., Subramania, G.: Unidirectional edge states in topological honeycomb-lattice membrane photonic crystals. Opt. Express 2(11), 23293 (2017)","journal-title":"Opt. Express"},{"key":"55_CR7","unstructured":"Yamijala, S.S., Bandhyopadyay, A., Pati, S.K.: Electronic properties of zigzag, armchair and their hybrid quantum dots of graphene and boron-nitride with and without substitution: a DFT study. \n                    https:\/\/arxiv.org\/pdf\/1405.4605"},{"key":"55_CR8","doi-asserted-by":"crossref","unstructured":"Das, S., Das, S., Majumder, A., Dasgupta, P., Das, D.K.: Delay estimates for graphene nanoribbons: a novel measure of fidelity and experiments with global routing trees. In: ACM GLSVLSI 2016, pp. 263\u2013268 (2016)","DOI":"10.1145\/2902961.2903036"},{"key":"55_CR9","doi-asserted-by":"publisher","unstructured":"Dhillon, G., Raghu, N.: Performance analysis of single-wall carbon nanotubes and copper as VLSI interconnect. Indian J. Sci. Technol. 9(S1) (2016). \n                    https:\/\/doi.org\/10.17485\/ijst\/2016\/v9iS1\/106892","DOI":"10.17485\/ijst\/2016\/v9iS1\/106892"},{"issue":"3","key":"55_CR10","doi-asserted-by":"publisher","first-page":"383","DOI":"10.1007\/s10707-006-0006-8","volume":"11","author":"R Reitsma","year":"2007","unstructured":"Reitsma, R., Trubin, S., Mortensen, E.: Weight-proportional space partitioning using adaptive Voronoi diagrams. GeoInformatica 11(3), 383\u2013405 (2007)","journal-title":"GeoInformatica"},{"key":"55_CR11","unstructured":"Dobrin, A.: A Review of Properties and Variations of Voronoi Diagrams. Whitman College (2005)"},{"key":"55_CR12","unstructured":"Santuari, A.: Steiner tree NP-completeness proof, Technical report, University of Trento, May 2003"}],"container-title":["Communications in Computer and Information Science","VLSI Design and Test"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-981-13-5950-7_55","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,20]],"date-time":"2019-05-20T23:45:52Z","timestamp":1558395952000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-981-13-5950-7_55"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019]]},"ISBN":["9789811359491","9789811359507"],"references-count":12,"URL":"https:\/\/doi.org\/10.1007\/978-981-13-5950-7_55","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"value":"1865-0929","type":"print"},{"value":"1865-0937","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019]]},"assertion":[{"value":"25 January 2019","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"VDAT","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Symposium on VLSI Design and Test","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Madurai","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"India","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2018","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"28 June 2018","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"30 June 2018","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"22","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"vdat2018","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"http:\/\/vdat2018.tce.edu","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}}]}}