{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,26]],"date-time":"2025-03-26T22:32:18Z","timestamp":1743028338358,"version":"3.40.3"},"publisher-location":"Singapore","reference-count":17,"publisher":"Springer Singapore","isbn-type":[{"type":"print","value":"9789813297661"},{"type":"electronic","value":"9789813297678"}],"license":[{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019]]},"DOI":"10.1007\/978-981-32-9767-8_20","type":"book-chapter","created":{"date-parts":[[2019,8,17]],"date-time":"2019-08-17T02:02:54Z","timestamp":1566007374000},"page":"224-235","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Radiation Hardened by Design Sense Amplifier"],"prefix":"10.1007","author":[{"given":"Avinash","family":"Verma","sequence":"first","affiliation":[]},{"given":"Gaurav","family":"Kaushal","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2019,8,18]]},"reference":[{"issue":"7","key":"20_CR1","doi-asserted-by":"publisher","first-page":"1527","DOI":"10.1109\/TED.2010.2047907","volume":"57","author":"E Ibe","year":"2010","unstructured":"Ibe, E., Taniguchi, H., Yahagi, Y., Shimbo, K.-I., Toba, T.: Impact of scaling on neutron-induced soft error in SRAMs from a 250 nm to a 22 nm design rule. IEEE Trans. Electron Devices 57(7), 1527\u20131538 (2010)","journal-title":"IEEE Trans. Electron Devices"},{"issue":"3","key":"20_CR2","doi-asserted-by":"publisher","first-page":"583","DOI":"10.1109\/TNS.2003.813129","volume":"50","author":"PE Dodd","year":"2003","unstructured":"Dodd, P.E., Massengill, L.W.: Basic mechanisms and modeling of single-event upset in digital microelectronics. IEEE Trans. Nucl. Sci. 50(3), 583\u2013602 (2003)","journal-title":"IEEE Trans. Nucl. Sci."},{"issue":"1","key":"20_CR3","doi-asserted-by":"publisher","first-page":"17","DOI":"10.1109\/7298.946456","volume":"1","author":"RC Baumann","year":"2001","unstructured":"Baumann, R.C.: Soft errors in advanced semiconductor devices part I: the three radiation sources. IEEE Trans. Device Mater. Rel. 1(1), 17\u201322 (2001)","journal-title":"IEEE Trans. Device Mater. Rel."},{"issue":"3","key":"20_CR4","doi-asserted-by":"publisher","first-page":"500","DOI":"10.1109\/TNS.2003.812928","volume":"50","author":"HL Hughes","year":"2003","unstructured":"Hughes, H.L., Benedetto, J.M.: Radiation effects and hardening of MOS technology: devices and circuits. IEEE Trans. Nucl. Sci. 50(3), 500\u2013521 (2003)","journal-title":"IEEE Trans. Nucl. Sci."},{"issue":"4","key":"20_CR5","doi-asserted-by":"publisher","first-page":"2000","DOI":"10.1109\/TNS.2010.2051682","volume":"57","author":"C Boatella","year":"2003","unstructured":"Boatella, C., Hubert, G., Ecoffet, R., Duzellier, S.: ICARE on-board SAC-C: more than 8 years of SEU and MCU, analysis and prediction. IEEE Trans. Nucl. Sci. 57(4), 2000\u20132009 (2003)","journal-title":"IEEE Trans. Nucl. Sci."},{"issue":"6","key":"20_CR6","doi-asserted-by":"publisher","first-page":"1978","DOI":"10.1109\/TVLSI.2017.2655079","volume":"25","author":"Aibin Yan","year":"2017","unstructured":"Yan, A., Huang, Z., Yi, M., Xu, X., Ouyang, Y., Liang, H.: Double-node-upset-resilient latch design for nanoscale CMOS technology. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 25(6), 1978\u20131982 (2017)","journal-title":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems"},{"issue":"1","key":"20_CR7","doi-asserted-by":"publisher","first-page":"106","DOI":"10.1109\/TNS.2016.2623696","volume":"64","author":"Z Chen","year":"2017","unstructured":"Chen, Z., Lin, M., Ding, D., Zheng, Y., Sang, Z., Zou, S.: Analysis of single-event effects in a radiation-hardened low-jitter PLL under heavy ion and pulsed laser irradiation. IEEE Trans. Nucl. Sci. 64(1), 106\u2013112 (2017)","journal-title":"IEEE Trans. Nucl. Sci."},{"key":"20_CR8","unstructured":"Chow, H.C., Chang, S.H.: High performance sense amplifier circuit for low power SRAM applications. In: Proceedings of IEEE International Conference ISCAS, pp. II-741\u2013II-744 (2004)"},{"key":"20_CR9","unstructured":"Golden, M., Tran, J., McGee, B., Kuo, B.: Sense amp design in SOI. In: Proceedings of IEEE International SOI Conference, pp. 118\u2013120 (2005)"},{"key":"20_CR10","doi-asserted-by":"crossref","unstructured":"Choudhary, A., Kundu, S.: A process variation tolerant self compensating sense amplifier design. In: Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2009), pp. 263\u2013267 (2009)","DOI":"10.1109\/ISVLSI.2009.50"},{"key":"20_CR11","doi-asserted-by":"crossref","unstructured":"Choudhary, A., Kundu, S.: A process variation tolerant self compensating Fin-FET based sense amplifier design. In: Proceedings of ACM Great Lakes Symposium on VLSI (GLSVLSI 2009), pp. 161\u2013164 (2009)","DOI":"10.1109\/ISVLSI.2009.50"},{"key":"20_CR12","unstructured":"Kobayashi, T., et al.: A current-controlled latch sense amplifier and a static power-saving input buffer for low-power architecture. IEICE Trans. Electron. 76(5), 863\u2013867 (1993)"},{"key":"20_CR13","unstructured":"Sinha, M., et al.: High-performance and low-voltage sense-amplifier techniques for sub-90 nm SRAM. In: Proceedings of IEEE International [Systems-on-Chip] SOC Conference. IEEE (2003)"},{"key":"20_CR14","doi-asserted-by":"crossref","unstructured":"Yeung, J., Mahmoodi, H.: Robust sense amplifier design under random dopant fluctuations in nano-scale CMOS technologies. In: 2006 IEEE International SOC Conference. IEEE (2006)","DOI":"10.1109\/SOCC.2006.283894"},{"issue":"2","key":"20_CR15","doi-asserted-by":"publisher","first-page":"183","DOI":"10.1109\/TVLSI.2005.863743","volume":"14","author":"S. Mukhopadhyay","year":"2006","unstructured":"Mukhopadhyay, S., Mahmoodi, H., Roy, K.: A novel high-performance and robust sense amplifier using independent gate control in sub-50-nm double-gate MOSFET. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 14(2), 183\u2013192 (2006)","journal-title":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems"},{"issue":"4","key":"20_CR16","doi-asserted-by":"publisher","first-page":"773","DOI":"10.1016\/j.microrel.2010.11.006","volume":"51","author":"SS Rathod","year":"2011","unstructured":"Rathod, S.S., Saxena, A.K., Dasgupta, S.: A low-noise, process-variation-tolerant double-gate FinFET based sense amplifier. Microelectron. Reliab. 51(4), 773\u2013780 (2011)","journal-title":"Microelectron. Reliab."},{"key":"20_CR17","doi-asserted-by":"crossref","unstructured":"Lupo, N., Bonizzoni, E., Maloberti, F.: A cross-coupled redundant sense amplifier for radiation hardened SRAMs. In: 2017 New Generation of CAS (NGCAS). IEEE (2017)","DOI":"10.1109\/NGCAS.2017.18"}],"container-title":["Communications in Computer and Information Science","VLSI Design and Test"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-981-32-9767-8_20","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,9,12]],"date-time":"2019-09-12T02:05:04Z","timestamp":1568253904000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-981-32-9767-8_20"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019]]},"ISBN":["9789813297661","9789813297678"],"references-count":17,"URL":"https:\/\/doi.org\/10.1007\/978-981-32-9767-8_20","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"type":"print","value":"1865-0929"},{"type":"electronic","value":"1865-0937"}],"subject":[],"published":{"date-parts":[[2019]]},"assertion":[{"value":"18 August 2019","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"VDAT","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Symposium on VLSI Design and Test","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Indore","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"India","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2019","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"4 July 2019","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"6 July 2019","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"23","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"vdat2019a","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"http:\/\/vdat2019.iiti.ac.in\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Single-blind","order":1,"name":"type","label":"Type","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"Easychair","order":2,"name":"conference_management_system","label":"Conference Management System","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"199","order":3,"name":"number_of_submissions_sent_for_review","label":"Number of Submissions Sent for Review","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"63","order":4,"name":"number_of_full_papers_accepted","label":"Number of Full Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"0","order":5,"name":"number_of_short_papers_accepted","label":"Number of Short Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"32% - The value is computed by the equation \"Number of Full Papers Accepted \/ Number of Submissions Sent for Review * 100\" and then rounded to a whole number.","order":6,"name":"acceptance_rate_of_full_papers","label":"Acceptance Rate of Full Papers","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"3","order":7,"name":"average_number_of_reviews_per_paper","label":"Average Number of Reviews per Paper","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"-","order":8,"name":"average_number_of_papers_per_reviewer","label":"Average Number of Papers per Reviewer","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"No","order":9,"name":"external_reviewers_involved","label":"External Reviewers Involved","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}}]}}