{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,26]],"date-time":"2025-03-26T07:44:13Z","timestamp":1742975053362,"version":"3.40.3"},"publisher-location":"Singapore","reference-count":15,"publisher":"Springer Singapore","isbn-type":[{"type":"print","value":"9789813297661"},{"type":"electronic","value":"9789813297678"}],"license":[{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019]]},"DOI":"10.1007\/978-981-32-9767-8_49","type":"book-chapter","created":{"date-parts":[[2019,8,17]],"date-time":"2019-08-17T02:02:54Z","timestamp":1566007374000},"page":"590-604","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":5,"title":["Design and Calibration of 14-bit 10\u00a0KS\/s Low Power SAR ADC for Bio-medical Applications"],"prefix":"10.1007","author":[{"given":"Yadukrishnan","family":"Mekkattillam","sequence":"first","affiliation":[]},{"given":"Satyajit","family":"Mohapatra","sequence":"additional","affiliation":[]},{"given":"Nihar R.","family":"Mohapatra","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2019,8,18]]},"reference":[{"issue":"2","key":"49_CR1","doi-asserted-by":"publisher","first-page":"477","DOI":"10.1109\/TCSI.2018.2859837","volume":"66","author":"W Mao","year":"2019","unstructured":"Mao, W., et al.: A low power 12-bit 1-kS\/s SAR ADC for biomedical signal processing. IEEE Trans. Circuits Syst. I 66(2), 477\u2013488 (2019)","journal-title":"IEEE Trans. Circuits Syst. I"},{"key":"49_CR2","doi-asserted-by":"publisher","first-page":"21990","DOI":"10.1109\/ACCESS.2019.2898154","volume":"7","author":"Y Hirai","year":"2019","unstructured":"Hirai, Y., et al.: A biomedical sensor system with stochastic A\/D conversion and error correction by machine learning. IEEE Access 7, 21990\u201322001 (2019)","journal-title":"IEEE Access"},{"issue":"10","key":"49_CR3","doi-asserted-by":"publisher","first-page":"1142","DOI":"10.1109\/TCSII.2016.2626300","volume":"64","author":"H Fan","year":"2017","unstructured":"Fan, H., Maloberti, F.: High-resolution SAR ADC with enhanced linearity. IEEE Trans. Circuits Syst. II Express Briefs 64(10), 1142\u20131146 (2017)","journal-title":"IEEE Trans. Circuits Syst. II Express Briefs"},{"issue":"10","key":"49_CR4","doi-asserted-by":"publisher","first-page":"1980","DOI":"10.1109\/TVLSI.2018.2846746","volume":"26","author":"J Luo","year":"2018","unstructured":"Luo, J., et al.: A 0.9-V 12-bit 100-MS\/s 14.6-fJ\/Conversion-Step SAR ADC in 40-nm CMOS. IEEE Trans. VLSI Syst. 26(10), 1980\u20131988 (2018)","journal-title":"IEEE Trans. VLSI Syst."},{"key":"49_CR5","doi-asserted-by":"crossref","unstructured":"Chang, A.H., et al.: A 12b 50 MS\/s 2.1 mW SAR ADC with redundancy and digital background calibration. In: Proceedings of the ESSCIRC, pp. 109\u2013112 (2013)","DOI":"10.1109\/ESSCIRC.2013.6649084"},{"issue":"11","key":"49_CR6","doi-asserted-by":"publisher","first-page":"2097","DOI":"10.1109\/TCAD.2008.2006139","volume":"27","author":"PW Luo","year":"2008","unstructured":"Luo, P.W., et al.: Impact of capacitance correlation on yield enhancement of mixed-signal\/analog integrated circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(11), 2097\u20132101 (2008)","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circuits Syst."},{"issue":"10","key":"49_CR7","doi-asserted-by":"publisher","first-page":"1691","DOI":"10.1109\/TCAD.2015.2419624","volume":"34","author":"C Soares","year":"2015","unstructured":"Soares, C., et al.: Automatic placement to improve capacitance matching using a generalized common-centroid layout and spatial correlation optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(10), 1691\u20131695 (2015)","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circuits Syst."},{"issue":"2","key":"49_CR8","doi-asserted-by":"publisher","first-page":"313","DOI":"10.1109\/TCAD.2009.2035587","volume":"29","author":"JE Chen","year":"2010","unstructured":"Chen, J.E., Luo, P.W., Wey, C.L.: Placement optimization for yield improvement of switched-capacitor analog integrated circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(2), 313\u2013318 (2010)","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circuits Syst."},{"key":"49_CR9","doi-asserted-by":"crossref","unstructured":"Mohapatra, S., et al.: Mismatch resilient 3.5 bit MDAC with MCS-CFCS. In: Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 175\u2013180 (2018)","DOI":"10.1109\/ISVLSI.2018.00041"},{"issue":"2","key":"49_CR10","doi-asserted-by":"publisher","first-page":"101","DOI":"10.1109\/TCSII.2016.2554758","volume":"64","author":"CF Soares","year":"2017","unstructured":"Soares, C.F., Petraglia, A., de Campos, G.S.: Methodologies for evaluating and measuring capacitance mismatch in CMOS integrated circuits. IEEE Trans. Circuits Syst. II Express Briefs 64(2), 101\u2013105 (2017)","journal-title":"IEEE Trans. Circuits Syst. II Express Briefs"},{"issue":"12","key":"49_CR11","doi-asserted-by":"publisher","first-page":"2891","DOI":"10.1109\/JSSC.2015.2463110","volume":"50","author":"MJ Kramer","year":"2015","unstructured":"Kramer, M.J., Janssen, E., Doris, K., Murmann, B.: A 14 b 35 MS\/s SAR ADC achieving 75 dB SNDR and 99 dB SFDR with loop-embedded input buffer in 40 nm CMOS. IEEE J. Solid-State Circuits 50(12), 2891\u20132900 (2015)","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"2","key":"49_CR12","doi-asserted-by":"publisher","first-page":"116","DOI":"10.1109\/TCSII.2016.2554858","volume":"64","author":"M Kr\u00e4mer","year":"2017","unstructured":"Kr\u00e4mer, M., et al.: A 14-bit 30-MS\/s 38-mW SAR ADC using noise filter gear shifting. IEEE Trans. Circuits Syst. II Express Briefs 64(2), 116\u2013120 (2017)","journal-title":"IEEE Trans. Circuits Syst. II Express Briefs"},{"key":"49_CR13","doi-asserted-by":"crossref","unstructured":"Yang, X., et al.: A 14.9 uW analog front-end with capacitively-coupled instrumentation amplifier and 14-bit SAR ADC for epilepsy diagnosis system. In: Proceedings of IEEE Biomedical Circuits and Systems Conference, pp. 268\u2013271 (2016)","DOI":"10.1109\/BioCAS.2016.7833783"},{"key":"49_CR14","doi-asserted-by":"crossref","unstructured":"Hesener, M., et al.: A 14b 40 MS\/s redundant SAR ADC with 480 MHz Clock in 0.13 pm CMOS. In: Proceedings of 2007 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 248\u2013600 (2007)","DOI":"10.1109\/ISSCC.2007.373387"},{"issue":"12","key":"49_CR15","doi-asserted-by":"publisher","first-page":"3059","DOI":"10.1109\/JSSC.2013.2274113","volume":"48","author":"R Kapusta","year":"2013","unstructured":"Kapusta, R., et al.: A 14b 80 Ms\/s SAR ADC with 73.6 dB SNDR in 65 nm CMOS. IEEE J. Solid-State Circuits 48(12), 3059\u20133066 (2013)","journal-title":"IEEE J. Solid-State Circuits"}],"container-title":["Communications in Computer and Information Science","VLSI Design and Test"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-981-32-9767-8_49","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,9,12]],"date-time":"2019-09-12T02:07:49Z","timestamp":1568254069000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-981-32-9767-8_49"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019]]},"ISBN":["9789813297661","9789813297678"],"references-count":15,"URL":"https:\/\/doi.org\/10.1007\/978-981-32-9767-8_49","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"type":"print","value":"1865-0929"},{"type":"electronic","value":"1865-0937"}],"subject":[],"published":{"date-parts":[[2019]]},"assertion":[{"value":"18 August 2019","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"VDAT","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Symposium on VLSI Design and Test","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Indore","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"India","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2019","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"4 July 2019","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"6 July 2019","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"23","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"vdat2019a","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"http:\/\/vdat2019.iiti.ac.in\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Single-blind","order":1,"name":"type","label":"Type","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"Easychair","order":2,"name":"conference_management_system","label":"Conference Management System","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"199","order":3,"name":"number_of_submissions_sent_for_review","label":"Number of Submissions Sent for Review","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"63","order":4,"name":"number_of_full_papers_accepted","label":"Number of Full Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"0","order":5,"name":"number_of_short_papers_accepted","label":"Number of Short Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"32% - The value is computed by the equation \"Number of Full Papers Accepted \/ Number of Submissions Sent for Review * 100\" and then rounded to a whole number.","order":6,"name":"acceptance_rate_of_full_papers","label":"Acceptance Rate of Full Papers","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"3","order":7,"name":"average_number_of_reviews_per_paper","label":"Average Number of Reviews per Paper","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"-","order":8,"name":"average_number_of_papers_per_reviewer","label":"Average Number of Papers per Reviewer","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"No","order":9,"name":"external_reviewers_involved","label":"External Reviewers Involved","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}}]}}