{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,28]],"date-time":"2025-03-28T03:42:12Z","timestamp":1743133332157,"version":"3.40.3"},"publisher-location":"Singapore","reference-count":23,"publisher":"Springer Nature Singapore","isbn-type":[{"type":"print","value":"9789819707904"},{"type":"electronic","value":"9789819707911"}],"license":[{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024]]},"DOI":"10.1007\/978-981-97-0791-1_12","type":"book-chapter","created":{"date-parts":[[2024,2,25]],"date-time":"2024-02-25T05:01:57Z","timestamp":1708837317000},"page":"145-155","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Design and Implementation of Virtual Reality Experiment Project of Integrated Circuit Routing Algorithm"],"prefix":"10.1007","author":[{"given":"Zeping","family":"Lu","sequence":"first","affiliation":[]},{"given":"Genggeng","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Fuling","family":"Ye","sequence":"additional","affiliation":[]},{"given":"Wenzhong","family":"Guo","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2024,2,26]]},"reference":[{"key":"12_CR1","unstructured":"Ministry of Industry and Information Technology. The first-level discipline of integrated circuits will be established to further strengthen the Demonstration School of Microelectronics. vol. 5, p. 1, Semiconductor Information (2019)"},{"key":"12_CR2","unstructured":"Ma, S., Shen, L., Wang, Y., Tang, Y., Tang, Z., Wang, Z.: Exploration on the construction of practice system for the training of integrated circuits design talent under the background of new engineering. Res. Explor. Lab. 41(1), 206\u2013210(2022)"},{"key":"12_CR3","unstructured":"Li, W., Fang, Y., Guo, Y., Ji, X., Xia, X., Zhang, C.: Research on virtual simulation in experimental teaching of integrated circuit series of courses. Exp. Sci. Technol. 15(2), 74\u201376 (2017)"},{"key":"12_CR4","unstructured":"Hu, J.: Research on the training plan of integrated circuit professional talents. Heilongjiang Edu. (High. Educ. Res. Eval.) 11, 89\u201390 (2020)"},{"key":"12_CR5","unstructured":"Gu, S., Du, D., Liu, Y., Ji, Z.: Exploration of teaching method of EDA course innovative experiment. Exp. Technol. Manag. 32(003), 40\u201343 (2015)"},{"key":"12_CR6","unstructured":"Yin, S.: Exploration of multi-level progressive experiment teaching of integrated circuit specialty. Res. Exp. Lab. 38(8), 166\u2013168 (2019)"},{"key":"12_CR7","unstructured":"Yin, S.: Discussion on integrated circuit experiment teaching under the background of innovation. Res. Exp. Lab. 39(7), 174\u2013177 (2020)"},{"key":"12_CR8","unstructured":"Yang, X., Liu, D.: EDA Technology Foundation and Experimental Tutorial. Tsinghua University Press, Beijing (2010)"},{"key":"12_CR9","unstructured":"Xu, N., Hong, X.: Integrated Circuit Physical Design Theory and Algorithm. Tsinghua University Press, Beijing (2009)"},{"key":"12_CR10","unstructured":"Wu, Q., Peng, M., Li, J.: Experiment of CPU design based on open-source EDA software. Comput. Educ. 8, 156\u2013159 (2018)"},{"key":"12_CR11","unstructured":"Li, H.: EDA Software Integrated Management System. University of Electronic Science and Technology of China, Beijing (2015)"},{"key":"12_CR12","unstructured":"Li, P., Mao, C., Xu, J.: Construction of the national virtual simulation experiment teaching centers, improving the experimental teaching informatization in higher education. Res. Exp. Lab. 32(11), 5\u20138 (2013)"},{"key":"12_CR13","unstructured":"Xu, W., Chen, Q., Ye, Y., Gu, G., Jin, Y.: Construction of teaching resources for computer virtual simulation experiment. Comput. Educ. 5, 118\u2013122 (2020)"},{"key":"12_CR14","unstructured":"Hu, Z., Wang, Y., Wang, C., Li, P.: Construction and thinking of virtual simulation experimental teaching center for civil engineering. Exp. Technol. Manag. 36(10), 218\u2013220(2019)"},{"key":"12_CR15","unstructured":"Zhao, X.: Exploration on the construction of virtual simulation teaching resources under the background of deep integration of production and education. China New Telecomm. 22(12), 222\u2013223 (2020)"},{"key":"12_CR16","unstructured":"Xiong, H.: Teaching characteristics of national virtual simulation experiment teaching project in new era. Exp. Technol. Manage. 36(9), 1\u20134 (2019)"},{"key":"12_CR17","unstructured":"Liu, G., Zhuang, Z., Guo, W., Chen, G.: A high-performance x-architecture multilayer global router for VLSI. Acta Automatica Sinica 46(1), 79\u201393 (2020)"},{"key":"12_CR18","doi-asserted-by":"crossref","unstructured":"Liu, G., Chen, Z., Zhuang, Z., Guo, W., Chen, G.: A unified algorithm based on HTS and self-adapting PSO for the construction of octagonal and rectilinear SMT. Soft Comput. 24(6), 3943\u20133961 (2020)","DOI":"10.1007\/s00500-019-04165-2"},{"key":"12_CR19","doi-asserted-by":"crossref","unstructured":"Zhang, X., et al.: Mini delay: multi-strategy timing-aware layer assignment for advanced technology nodes. In: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE 2020), pp. 586\u2013591 (2020)","DOI":"10.23919\/DATE48585.2020.9116269"},{"key":"12_CR20","unstructured":"Liu, G., Baom, C., Wang, X., Guo, W.,* Chen, G.: Multi-strategy delay-driven layer assignment for non-default-rule wiring techniques.\u00a0Jisuanji Xuebao\/Chin. J. Comput. 46(4), 743\u2013760(2023)"},{"key":"12_CR21","doi-asserted-by":"crossref","unstructured":"Liu, G., Wei, L., Xu, N*.: Multi-strategy layer assignment algorithm considering bus timing matching.\u00a0Jisuanji Fuzhu Sheji Yu Tuxingxue Xuebao\/J. Comput.-Aided Des. Comput. Graph.\u00a034(4), 545\u2013551(2022)","DOI":"10.3724\/SP.J.1089.2022.19446"},{"key":"12_CR22","doi-asserted-by":"crossref","unstructured":"Zhen, Z., Liu*, G., Ho, T.-Y., Yu, B., Guo, W.: TRADER: a practical track-assignment-based detailed router. In: Design, Automation and Test in Europe Conference and Exhibition (DATE 2022), pp. 766\u2013771 (2022)","DOI":"10.23919\/DATE54114.2022.9774774"},{"key":"12_CR23","doi-asserted-by":"crossref","unstructured":"Liu, G., Zhang, X., Guo, W., Huang*, X., Liu, W.-H., Chao, K.-Y., Wang, T.-C.: Timing-aware layer assignment for advanced process technologies considering via pillars. IEEE Trans. Comput.-Aided Des. Integr. Circ. Syst. 41(6), 1957\u20131970 (2022)","DOI":"10.1109\/TCAD.2021.3100296"}],"container-title":["Communications in Computer and Information Science","Computer Science and Education. Teaching and Curriculum"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-981-97-0791-1_12","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,11,12]],"date-time":"2024-11-12T19:41:01Z","timestamp":1731440461000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-981-97-0791-1_12"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024]]},"ISBN":["9789819707904","9789819707911"],"references-count":23,"URL":"https:\/\/doi.org\/10.1007\/978-981-97-0791-1_12","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"type":"print","value":"1865-0929"},{"type":"electronic","value":"1865-0937"}],"subject":[],"published":{"date-parts":[[2024]]},"assertion":[{"value":"26 February 2024","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"ICCSE","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Conference on Computer Science and Education","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Sepang","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Malaysia","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2023","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"1 December 2023","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"7 December 2023","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"18","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"iccse12023","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"http:\/\/ieee-iccse.org","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Double-blind","order":1,"name":"type","label":"Type","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"EquinOCS, EasyChair","order":2,"name":"conference_management_system","label":"Conference Management System","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"305","order":3,"name":"number_of_submissions_sent_for_review","label":"Number of Submissions Sent for Review","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"106","order":4,"name":"number_of_full_papers_accepted","label":"Number of Full Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"36","order":5,"name":"number_of_short_papers_accepted","label":"Number of Short Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"35% - The value is computed by the equation \"Number of Full Papers Accepted \/ Number of Submissions Sent for Review * 100\" and then rounded to a whole number.","order":6,"name":"acceptance_rate_of_full_papers","label":"Acceptance Rate of Full Papers","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"3","order":7,"name":"average_number_of_reviews_per_paper","label":"Average Number of Reviews per Paper","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"6","order":8,"name":"average_number_of_papers_per_reviewer","label":"Average Number of Papers per Reviewer","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"Yes","order":9,"name":"external_reviewers_involved","label":"External Reviewers Involved","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}}]}}