{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,6]],"date-time":"2025-06-06T10:25:28Z","timestamp":1749205528778},"reference-count":12,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[1992,5,1]],"date-time":"1992-05-01T00:00:00Z","timestamp":704678400000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[1992,5]]},"DOI":"10.1007\/bf00137254","type":"journal-article","created":{"date-parts":[[2004,11,6]],"date-time":"2004-11-06T04:31:41Z","timestamp":1099715501000},"page":"171-173","source":"Crossref","is-referenced-by-count":13,"title":["Multiple fault detection in two-level multi-output circuits"],"prefix":"10.1007","volume":"3","author":[{"given":"James","family":"Jacob","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vishwani D.","family":"Agrawal","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"CR1","doi-asserted-by":"crossref","unstructured":"W. Maly, ?Realistic fault modeling for VLSI testing,? Proc. 24th Design Automation Conf., pp. 173?180, June 1987.","DOI":"10.1145\/37888.37914"},{"key":"CR2","doi-asserted-by":"crossref","unstructured":"G. Hachtel, R. Jacoby, K. Keutzer and C. Morrison, ?On properties of algebraic transformations and the multifault testability of multilevel logic,? Proc. Int. Conf. Computer Aided Design, pp. 422?425, 1989.","DOI":"10.1109\/ICCAD.1989.76983"},{"key":"CR3","doi-asserted-by":"crossref","unstructured":"J. Jacob and V.D. Agarwal, ?Functional test generation for sequential circuits,? Proc. 5th International Conf. VLSI Design, Bangalore, India, pp. 17?24, January 1992.","DOI":"10.1109\/ICVD.1992.658015"},{"key":"CR4","doi-asserted-by":"crossref","first-page":"556","DOI":"10.1109\/TC.1972.5009008","volume":"vol. c-21","author":"I. Kohavi","year":"June 1972","unstructured":"I. Kohavi and Z. Kohavi, ?Detection of multiple faults in combinational logic networks,? IEEE Trans. Comput., vol. c-21, pp. 556?568, June 1972.","journal-title":"IEEE Trans. Comput."},{"key":"CR5","doi-asserted-by":"crossref","first-page":"858","DOI":"10.1109\/TC.1972.5009041","volume":"vol. c-21","author":"D. Schertz","year":"August 1972","unstructured":"D. Schertz and G. Metze, ?A new representation for faults in combinational digital circuits,? IEEE Trans. Comput., vol. c-21, pp. 858?866, August 1972.","journal-title":"IEEE Trans. Comput."},{"key":"CR6","doi-asserted-by":"crossref","first-page":"518","DOI":"10.1109\/TC.1980.1675612","volume":"vol. c-29","author":"V.K. Agrawal","year":"June 1980","unstructured":"V.K. Agrawal, ?Multiple fault detection in programmable logic arrays,? IEEE Trans. Comput., vol. c-29, pp. 518?522, June 1980.","journal-title":"IEEE Trans. Comput."},{"key":"CR7","doi-asserted-by":"crossref","unstructured":"M.A. Breuer and A.D. Friedman, Diagnosis and Reliable Design of Digital Systems, Computer Science Press, 1976.","DOI":"10.1007\/978-3-642-95424-5"},{"key":"CR8","doi-asserted-by":"crossref","first-page":"395","DOI":"10.1007\/BF00135233","volume":"vol. 2","author":"J.E. Chen","year":"November 1991","unstructured":"J.E. Chen, C.L. Lee and W.Z. Shen, ?Checkpoints in irredundant two-level combinational circuits,? Jour. Electronic Testing: Theory and Applic., vol. 2, pp. 395?397, November 1991.","journal-title":"Jour. Electronic Testing: Theory and Applic."},{"key":"CR9","doi-asserted-by":"crossref","first-page":"845","DOI":"10.1109\/TC.1979.1675264","volume":"vol. c-28","author":"J.E. Smith","year":"November 1979","unstructured":"J.E. Smith, ?Detection of faults in programmable logic arrays,? IEEE Trans. Comput., vol. c-28, pp. 845?853, November 1979.","journal-title":"IEEE Trans. Comput."},{"key":"CR10","doi-asserted-by":"crossref","first-page":"931","DOI":"10.1109\/TC.1986.1676688","volume":"vol. c-35","author":"J.E. Smith","year":"October 1986","unstructured":"J.E. Smith, ?Author's reply,? IEEE Trans. Comput., vol. c-35, p. 931, October 1986.","journal-title":"IEEE Trans. Comput."},{"key":"CR11","doi-asserted-by":"crossref","first-page":"930","DOI":"10.1109\/TC.1986.1676687","volume":"vol. c-35","author":"L.Y. Wei","year":"October 1986","unstructured":"L.Y. Wei and J. Wei, ?Comments on detection of faults in programmable logic arrays,? IEEE Trans. Comput., vol. c-35, pp. 930?931, October 1986.","journal-title":"IEEE Trans. Comput."},{"key":"CR12","unstructured":"J. Jacob and N.N. Biswas, ?GTBD faults and lower bounds on multiple fault coverage of single fault test sets,? Proc. International Test Conf., pp. 849?855, September 1987."}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF00137254.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/BF00137254\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF00137254","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,4,3]],"date-time":"2019-04-03T06:28:08Z","timestamp":1554272888000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BF00137254"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1992,5]]},"references-count":12,"journal-issue":{"issue":"2","published-print":{"date-parts":[[1992,5]]}},"alternative-id":["BF00137254"],"URL":"https:\/\/doi.org\/10.1007\/bf00137254","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"value":"0923-8174","type":"print"},{"value":"1573-0727","type":"electronic"}],"subject":[],"published":{"date-parts":[[1992,5]]}}}