{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,12,20]],"date-time":"2024-12-20T05:36:25Z","timestamp":1734672985471,"version":"3.32.0"},"reference-count":10,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[1996,9,1]],"date-time":"1996-09-01T00:00:00Z","timestamp":841536000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Neural Process Lett"],"published-print":{"date-parts":[[1996,9]]},"DOI":"10.1007\/bf00454845","type":"journal-article","created":{"date-parts":[[2004,11,13]],"date-time":"2004-11-13T07:35:05Z","timestamp":1100331305000},"page":"45-52","source":"Crossref","is-referenced-by-count":2,"title":["Modular neuro-chip with on-chip learning and adjustable learning parameters"],"prefix":"10.1007","volume":"4","author":[{"given":"Jung-Wook","family":"Cho","sequence":"first","affiliation":[]}],"member":"297","reference":[{"key":"CR1","unstructured":"Y.K. Choi and S.Y. Lee, ?Subthreshold MOS implementation of neural networks with on-chip error back-propagation learning?, in Proc. Int. Joint Conf. Neural Network, pp. 849?852, Nagoya, Japan, 1993."},{"key":"CR2","doi-asserted-by":"crossref","first-page":"1868","DOI":"10.1109\/4.173117","volume":"27","author":"T. Shima","year":"1992","unstructured":"T.Shima, T.Kimura, Y.Kamatani, T.Itakura, Y.Fujita and T.Iida, ?Neuro chips with on-chip back-propagation and\/or Hebbian learning?, IEEE J. Solid State Circuits, Vol. 27, pp. 1868?1876, 1992.","journal-title":"IEEE J. Solid State Circuits"},{"key":"CR3","doi-asserted-by":"crossref","first-page":"201","DOI":"10.1109\/4.209997","volume":"28","author":"S. M. Gowda","year":"1993","unstructured":"S. M.Gowda, B. J.Sheu, J.Choi, C. G.Hwang, J. S.Cable, ?Design and characterization of analog VLSI neural network modules?, IEEE J. Solid State Circuits, Vol. 28, pp. 201?313, 1993.","journal-title":"IEEE J. Solid State Circuits"},{"key":"CR4","unstructured":"C. Lau, ?Neural networks on a chip?, in Proc. World Congress on Neural Network, pp. 1907?1911, Washington DC, USA, 1995."},{"key":"CR5","unstructured":"M. Chiaberge, D. Del Corso, L.M. Reynei and L. Zocca, ?A real time controller based on a pulse stream neural system?, in Proc. World Congress on Neural Network, Vol. 2, pp. 147?152, San Diego, USA, 1994."},{"key":"CR6","doi-asserted-by":"crossref","unstructured":"X. Arreguit, and E. A. Vittoz, ?Analog VLSI hardware: what is missing for industrial realisations?, in Proc. Int. Conf. on Neural Network, pp. 1883?1884, Orlando, USA, 1994.","DOI":"10.1109\/ICNN.1994.374445"},{"key":"CR7","doi-asserted-by":"crossref","unstructured":"P.H.W. Leong, M. Jabri, ?A VLSI neural network for morphology classification?, in Proc. Int. Joint Conf. Neural Network, Vol. 2, pp. 678?683, Baltimore, USA, 1992.","DOI":"10.1109\/IJCNN.1992.226909"},{"key":"CR8","doi-asserted-by":"crossref","unstructured":"E. Lange, E. Funatsu, K. Hara, K. Kyuma, ?Artificial retina devices ? fast front ends for neural image processing systems?, in Proc. Int. Joint Conf. Neural Network, pp. 801?804, Nagoya, Japan, 1993.","DOI":"10.1109\/IJCNN.1993.714034"},{"key":"CR9","doi-asserted-by":"crossref","unstructured":"T. Duong, S. Kemeny, M. Tran, T. Daud, and A. Thakoor, ?Low power analog neurosynapse chips for a 3-D sugarcube neuroprocessor?, pp. 1907?1911, in Proc. Int. Conf. on Neural Network, Orlando, USA, 1994.","DOI":"10.1109\/ICNN.1994.374451"},{"key":"CR10","unstructured":"S. Y. Lee, ?Error minimization, generalization, and hardware implementability of supervised learning?, in Proc. World Congress on Neural Network, Vol. 3, pp. 325?330, San Diego, USA, 1994."}],"container-title":["Neural Processing Letters"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF00454845.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/BF00454845\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF00454845","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,12,20]],"date-time":"2024-12-20T00:53:58Z","timestamp":1734656038000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BF00454845"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1996,9]]},"references-count":10,"journal-issue":{"issue":"1","published-print":{"date-parts":[[1996,9]]}},"alternative-id":["BF00454845"],"URL":"https:\/\/doi.org\/10.1007\/bf00454845","relation":{},"ISSN":["1370-4621","1573-773X"],"issn-type":[{"type":"print","value":"1370-4621"},{"type":"electronic","value":"1573-773X"}],"subject":[],"published":{"date-parts":[[1996,9]]}}}