{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,10,23]],"date-time":"2023-10-23T14:25:17Z","timestamp":1698071117728},"reference-count":13,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[1989,8,1]],"date-time":"1989-08-01T00:00:00Z","timestamp":617932800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J VLSI Sign Process Syst Sign Image Video Technol"],"published-print":{"date-parts":[[1989,8]]},"DOI":"10.1007\/bf00932065","type":"journal-article","created":{"date-parts":[[2005,1,3]],"date-time":"2005-01-03T01:41:40Z","timestamp":1104716500000},"page":"45-56","source":"Crossref","is-referenced-by-count":3,"title":["Parallel implementation of synthetic aperture radar algorithms"],"prefix":"10.1007","volume":"1","author":[{"given":"K. Wojtek","family":"Przytula","sequence":"first","affiliation":[]},{"given":"J. Greg","family":"Nash","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[1989,8,1]]},"reference":[{"key":"BF00932065_CR1","unstructured":"K.W. Przytula and J.G. Nash, \u201cA Special Purpose Coprocessor for Signal Processing,\u201d 21st Asilomar Conference on Signal, Systems and Computers, Monterey, 1987."},{"key":"BF00932065_CR2","unstructured":"R. Wojslaw, \u201cASAR's Data Bandwidth Reduction via On-Board Processing,\u201d Hughes Aircraft Company Internal Report, Nov. 1987."},{"key":"BF00932065_CR3","first-page":"3","volume":"20","author":"C. Wu","year":"1982","unstructured":"C. Wu, B. Barkan, W.J. Karplus, and D. Caswell, \u201cSEASAT synthetic aperture radar data reduction using parallel programmable array processors,\u201dIEEE Transactions on Geoscience and Remote Sensing, GE-20, 3 1982.","journal-title":"IEEE Transactions on Geoscience and Remote Sensing"},{"key":"BF00932065_CR4","unstructured":"R.W. Okkes, \u201cThe ESA\/BMFT Real-time SAR processing and test facility,\u201dDigital Signal Processing\u201484 (V. Cappellini and A.G. Constantinides, eds.), Elsevier Science Publishers, 1984."},{"key":"BF00932065_CR5","doi-asserted-by":"crossref","unstructured":"B. Friedlander and J. Newkirk, \u201cA comparison of two SAR processing architectures for VLSI implementation,\u201dProc. ICASSP '83, Boston, 1983.","DOI":"10.1109\/ICASSP.1983.1172027"},{"key":"BF00932065_CR6","unstructured":"K.Y. Liu, W.E. Arens, H.M. Assal, and J.F. Vaseoky, \u201cSpacecraft on-board SAR image generation for EOS-type missions,\u201dProc. IGARSS Symposium, Ann Arbor, May 1987."},{"key":"BF00932065_CR7","unstructured":"R. Fabrizio, \u201cA high speed digital processor for real-time synthetic aperture radar imaging,\u201dProc. IGARSS Symposium, Ann Arbor, 18\u201321 May, 1987."},{"key":"BF00932065_CR8","doi-asserted-by":"crossref","unstructured":"D.G. Appelby and J.J. Soraghan, \u201cFast SAR signal processing on the DAP,\u201dProc. ICASSP, Tokyo, 1986.","DOI":"10.1109\/ICASSP.1986.1168528"},{"key":"BF00932065_CR9","doi-asserted-by":"crossref","unstructured":"K.W. Przytula, J.G. Nash, and S. Hansen, \u201cFast Fourier Algorithm for Two-dimensional Array of Processors,\u201dAdvanced Algorithms and Architectures for Signal Processing II, Proc. SPIE 826, 1987, pp. 186\u2013198.","DOI":"10.1117\/12.942032"},{"key":"BF00932065_CR10","first-page":"4","volume":"20","author":"D.A. Ausherman","year":"1984","unstructured":"D.A. Ausherman, A. Kozma, J.L. Walker, H.M. Jones, and E.C. Poggio, \u201cDevelopments in radar imaging,\u201dIEEE Trans. on Aerospace & Elect. Syst., AES-20, 4, 1984.","journal-title":"IEEE Trans. on Aerospace & Elect. Syst."},{"key":"BF00932065_CR11","doi-asserted-by":"crossref","unstructured":"J.G. Nash, S. Hansen, and K.W. Przytula, \u201cSystolic Partitioned and Banded Linear Algebraic Computations,\u201dSPIE 30th Annual Technical Symposium: Real Time Signal Processing IX, San Diego, August, 1986, pp. 10\u201316.","DOI":"10.1117\/12.976241"},{"issue":"no. 2","key":"BF00932065_CR12","doi-asserted-by":"crossref","first-page":"129","DOI":"10.1109\/12.2142","volume":"37","author":"J.G. Nash","year":"1983","unstructured":"J.G. Nash and S. Hansen, \u201cModified Faddeeva algorithm for concurrent execution of linear algebraic operations,\u201dIEEE Transactions on Computers, vol. 37, no. 2, 1983, p. 129.","journal-title":"IEEE Transactions on Computers"},{"key":"BF00932065_CR13","doi-asserted-by":"crossref","unstructured":"M.J. Little, R.D. Etchells, J. Grinberg, S.P. Laub, J.G. Nash, and M.W. Yung, \u201cThe 3-D Computer,\u201d to be presented at International Conference on Wafer Scale Integration, San Francisco, January 1989.","DOI":"10.1109\/WAFER.1989.47536"}],"container-title":["Journal of VLSI signal processing systems for signal, image and video technology"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF00932065.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/BF00932065\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF00932065","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,4,29]],"date-time":"2019-04-29T17:44:54Z","timestamp":1556559894000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BF00932065"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1989,8]]},"references-count":13,"journal-issue":{"issue":"1","published-print":{"date-parts":[[1989,8]]}},"alternative-id":["BF00932065"],"URL":"https:\/\/doi.org\/10.1007\/bf00932065","relation":{},"ISSN":["0922-5773"],"issn-type":[{"value":"0922-5773","type":"print"}],"subject":[],"published":{"date-parts":[[1989,8]]}}}