{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,12,22]],"date-time":"2024-12-22T14:10:03Z","timestamp":1734876603177,"version":"3.32.0"},"reference-count":22,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[1995,4,1]],"date-time":"1995-04-01T00:00:00Z","timestamp":796694400000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[1995,4]]},"DOI":"10.1007\/bf00993085","type":"journal-article","created":{"date-parts":[[2005,1,9]],"date-time":"2005-01-09T16:51:24Z","timestamp":1105289484000},"page":"179-190","source":"Crossref","is-referenced-by-count":1,"title":["Testability of artificial neural networks: A behavioral approach"],"prefix":"10.1007","volume":"6","author":[{"given":"Vincenzo","family":"Piuri","sequence":"first","affiliation":[]},{"given":"Mariagiovanna","family":"Sami","sequence":"additional","affiliation":[]},{"given":"Donatella","family":"Sciuto","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"CR1","unstructured":"J. Beichter, U. Ramacher, and H. Klar, ?VLSI design of a neural signal processor,?Proc. IFIP Workshop on Silicon Architectures for Neural Networks, St. Paul de Vence, France, pp. 245?260, 1990."},{"key":"CR2","doi-asserted-by":"crossref","unstructured":"C. Lehmann and F. Blayo, ?A VLSI implementation of a generic systolic synaptic building block for neural networks,?Proc. Int'l Workshop on VLSI for artificial intelligence and neural networks, Oxford, UK, pp. G7:1?12, 1990.","DOI":"10.1007\/978-1-4615-3752-6_32"},{"key":"CR3","doi-asserted-by":"crossref","unstructured":"F. Distante, M. Sami, R. Stefanelli, and G. Storti-Gajani, ?Fault tolerant characteristics of the linear array architecture for WSI implementation of neural nets,?Proc. IEEE International Conference on WSI San Francisco, CA, pp. 113?120, 1991.","DOI":"10.1109\/ICWSI.1991.151704"},{"key":"CR4","unstructured":"P.Y. Alla, J. Ouali, G. Saucier, L. Masse-Navette, and J. Trilhe, ?Silicon compilation of neuro-ASICs supported by a distributed and synchronous neural network architecture,?Proc. 2nd Int'l Conf. on Microelectronics for Neural Networks, Munich, Germany, pp. 341?346, 1991."},{"key":"CR5","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4613-1639-8","volume-title":"Analog, VLSI and Neural Systems","author":"C. Mead","year":"1989","unstructured":"C. Mead,Analog, VLSI and Neural Systems, Addison-Wesley Publishing Co., Reading, MA, 1989."},{"key":"CR6","doi-asserted-by":"crossref","unstructured":"P.Y. Alla, G. Saucier, S. Knerr, and L. Personnaz, ?Design and implementation of a dedicated neural network for handwritten digit recognition,?Proc. IFIP Workshop on Silicon Architectures for Neural Nets, St. Paul de Vence, France, pp. 261?270, 1990.","DOI":"10.1109\/EUASIC.1991.212892"},{"key":"CR7","unstructured":"M. Yasunaga et al., ?Design, fabrication and evaluation of a 5-inch wafer scale neural network LSI composed of 576 digital neurons,?Proc. IJCNN 1990, San Diego, CA, pp. 1350?1354, 1990."},{"key":"CR8","doi-asserted-by":"crossref","unstructured":"P.Y. Alla, G. Dreyfus, J.D. Gascuel, A. Johannet, L. Personnaz, J. Roman, and M. Weinfeld, ?Silicon integration of learning algorithm and other auto-adaptive properties in a digital feedback neural network,?Proc. IEEE\/ITG Workshop on Microelectronics for Neural Networks, Dortmund, Germany, pp. 40?46, 1990.","DOI":"10.1007\/978-1-4615-3994-0_9"},{"key":"CR9","doi-asserted-by":"crossref","unstructured":"S.Y. Kung, ?Parallel architectures for artificial neural nets,?Proc. Systolic Arrays 1988, San Diego, CA, pp. 163?174, 1988.","DOI":"10.1109\/ICNN.1988.23925"},{"key":"CR10","doi-asserted-by":"crossref","unstructured":"C.H. Chen, C. Wu, and D.G. Saab, ?BETA: behavioral testability analysis,?Proc. ICCAD, Santa Clara, CA, pp. 202?205, 1991.","DOI":"10.1109\/ICCAD.1991.185231"},{"key":"CR11","doi-asserted-by":"crossref","unstructured":"M. Bombana, G. Buonanno, P. Cavallro, D. Seiuto, and G. Zaza, ?A multi-level testability assistant for VLSI design,?Proc. EuroDAC 92, Hamburg, Germany, pp. 258?263, 1992.","DOI":"10.1109\/EURDAC.1992.246234"},{"key":"CR12","doi-asserted-by":"crossref","unstructured":"A. Antola, M. Sami, and D. Sciuto, ?High-level design of algorithm-driven architectures: the testability and diagnosability issue,?Proc. Int'l Conf. on Wafer-Scale Integration, San Francisco, CA, pp. 271?280, 1992.","DOI":"10.1109\/ICWSI.1992.171819"},{"issue":"No. 2","key":"CR13","doi-asserted-by":"crossref","first-page":"103","DOI":"10.1007\/BF00137388","volume":"1","author":"D. Bhattacharya","year":"1990","unstructured":"D. Bhattacharya and J.P. Hayes, ?A Hierarchical Test Generation Methodology for Digital Circuits,?Journal of Electronic Testing: Theory and Applications, Vol. 1, No. 2, pp. 103?124, May 1990.","journal-title":"Journal of Electronic Testing: Theory and Applications"},{"key":"CR14","volume-title":"Introduction to the Theory of Neural Computation","author":"J. Hertz","year":"1991","unstructured":"J. Hertz, A. Krog, and R.G. Palmer,Introduction to the Theory of Neural Computation, Addison-Wesley, Redwood City, CA, 1991."},{"key":"CR15","doi-asserted-by":"crossref","unstructured":"C.H. Chen and P.R. Menon, ?An approach to functional level testability analysis,?Proc. ITC, pp. 188?191, 1989.","DOI":"10.1109\/TEST.1989.82321"},{"issue":"No. 1","key":"CR16","doi-asserted-by":"crossref","first-page":"71","DOI":"10.1109\/72.80206","volume":"1","author":"M. Stevenson","year":"1990","unstructured":"M. Stevenson, R. Winter, and B. Widrow, ?Sensitivity of feedforward neural networks to weight errors,?IEEE Trans. Neural Networks, Vol. 1, No. 1, pp. 71?80, March 1990.","journal-title":"IEEE Trans. Neural Networks"},{"key":"CR17","doi-asserted-by":"crossref","unstructured":"C. Alippi, V. Piuri, and M. Sami, ?The issue of error sensitivity in neural networks,?Proc. IEEE Conference on Massively Parallel Computing Systems, Ischia Italy, pp. 464?476, May 1994.","DOI":"10.1109\/MPCS.1994.367080"},{"key":"CR18","doi-asserted-by":"crossref","DOI":"10.7551\/mitpress\/5236.001.0001","volume-title":"Parallel Distributed Processing: Explorations in the Microstructure of Cognition","author":"D.E. Rumelhart","year":"1986","unstructured":"D.E. Rumelhart and J.L. McClelland, itors,Parallel Distributed Processing: Explorations in the Microstructure of Cognition, Vol. 1, MIT Press, Cambridge, MA, 1986."},{"key":"CR19","doi-asserted-by":"crossref","unstructured":"D. Zhang, G.A. Jullien, W.C. Miller, and E. Swartzlander, ?Arithmetic for Digital Neural Networks,?Proc. 10th IEEE Symp. Computer Arithmetics, Grenoble, France, pp. 78?83, 1991.","DOI":"10.1109\/ARITH.1991.145534"},{"key":"CR20","doi-asserted-by":"crossref","unstructured":"F. Distante, M. Sami, R. Stefanelli, and G. Storti-Gajani, ?A compact and fast silicon implementation for layered neural nets.,?Proc. Int'l Workshop on VLSI for artificial intelligence and neural networks, Oxford, U.K., pp G9:1?11, 1990.","DOI":"10.1007\/978-1-4615-3752-6_34"},{"issue":"No. 4","key":"CR21","doi-asserted-by":"crossref","first-page":"444","DOI":"10.1109\/5.92039","volume":"79","author":"F. Distante","year":"1991","unstructured":"F. Distante, M. Sami, R. Stefanelli, and G. Storti-Gajani, ?Mapping neural nets onto a massively parallel architecture. a defect-tolerance solution,?IEEE Proceedings, Vol. 79, No. 4, pp. 444?460, April 1991.","journal-title":"IEEE Proceedings"},{"key":"CR22","doi-asserted-by":"crossref","unstructured":"M. Annaratone and R. Stefanelli, ?A multiplier with multiple error correction capability,?Proc. ARITH-6 pp. 44?51, 1983.","DOI":"10.1109\/ARITH.1983.6158065"}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF00993085.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/BF00993085\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF00993085","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,12,22]],"date-time":"2024-12-22T13:40:18Z","timestamp":1734874818000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BF00993085"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1995,4]]},"references-count":22,"journal-issue":{"issue":"2","published-print":{"date-parts":[[1995,4]]}},"alternative-id":["BF00993085"],"URL":"https:\/\/doi.org\/10.1007\/bf00993085","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"type":"print","value":"0923-8174"},{"type":"electronic","value":"1573-0727"}],"subject":[],"published":{"date-parts":[[1995,4]]}}}