{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,12,22]],"date-time":"2024-12-22T16:40:11Z","timestamp":1734885611998,"version":"3.32.0"},"reference-count":25,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[1995,2,1]],"date-time":"1995-02-01T00:00:00Z","timestamp":791596800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[1995,2]]},"DOI":"10.1007\/bf00993129","type":"journal-article","created":{"date-parts":[[2005,1,14]],"date-time":"2005-01-14T17:55:23Z","timestamp":1105725323000},"page":"45-58","source":"Crossref","is-referenced-by-count":1,"title":["Efficient sensitization of multi-bit-paths for testing embedded modules in synchronous sequential circuits"],"prefix":"10.1007","volume":"6","author":[{"given":"Konstantin","family":"Keutner","sequence":"first","affiliation":[]},{"given":"Erwin","family":"Trischler","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"CR1","doi-asserted-by":"crossref","first-page":"56","DOI":"10.1109\/MDT.1985.294746","volume":"2","author":"M.S. Abadir","year":"1985","unstructured":"M.S. Abadir and M.A. Breuer, ?A Knowlegde-Based System for Designing Testable Chips,?IEEE Design & Test of Computers, Vol. 2, pp. 56?86, August 1985.","journal-title":"IEEE Design & Test of Computers"},{"issue":"No. 3","key":"CR2","doi-asserted-by":"crossref","first-page":"175","DOI":"10.1145\/356914.356916","volume":"15","author":"M.S. Abadir","year":"1983","unstructured":"M.S. Abadir and H.K. Reghbati, ?Functional Testing of Semiconductor Random Access Memories,?ACM Computing Surveys, Vol. 15, No. 3, pp. 175?198, September 1983.","journal-title":"ACM Computing Surveys"},{"key":"CR3","unstructured":"M. Abramovici, M.A. Breuer, and A.D. Friedman,Digital Systems Testing and Testable Design, Computer Science Press, 1990."},{"key":"CR4","doi-asserted-by":"crossref","unstructured":"G. Alfs, R.W. Hartenstein, and A. Wodko, ?The KARL\/KARATE System-Automatic Test Pattern Generation Based on RT Level Descriptions,?Proc. Int. Test Conf., pp. 230?235, 1988.","DOI":"10.1109\/TEST.1988.207807"},{"key":"CR5","unstructured":"B. Becker, ?An Easily Testable Optimal-Time VLSI Multiplier,?Proc. Euromicro, pp. 401?409, 1985."},{"key":"CR6","unstructured":"C. Benmehrez and J.F. McDonald, ?The Subscripted D-Algorithm-ATPG with Multiple Independent Control Paths,?Proc. IEEE Autom. Test Program Gener. Workshop, pp. 71?81, March 1983."},{"key":"CR7","doi-asserted-by":"crossref","first-page":"103","DOI":"10.1007\/BF00137388","volume":"1","author":"D. Bhattacharya","year":"1990","unstructured":"D. Bhattacharya and J.P. Hayes, ?A Hierarchical Test Generation Methodology for Digital Circuits,?Jour. Electronic Testing: Theory and Applic., Vol. 1, pp. 103?123, May 1990.","journal-title":"Jour. Electronic Testing: Theory and Applic."},{"key":"CR8","doi-asserted-by":"crossref","unstructured":"F. Brglez, D. Bryan, and K. Kozminski, ?Combinational Profiles of Sequential Benchmark Circuits,?Proc. IEEE Int. Symp. on Circuits and Systems, pp. 1929?1934, 1989.","DOI":"10.1109\/ISCAS.1989.100747"},{"key":"CR9","unstructured":"F. Brglez and H. Fujiwara, ?A Neutral Netlist of 10 Combinational Benchmark Circuits and a Target Translator in FORTRAN,?Proc. IEEE Int. Symp. on Circuits and Systems, June 1985."},{"key":"CR10","doi-asserted-by":"crossref","first-page":"43","DOI":"10.1109\/2.25381","volume":"22","author":"W.-T. Cheng","year":"1989","unstructured":"W.-T. Cheng and T.J. Chakraborty, ?Gentest?An Automatic Test-Generation System for Sequential Circuits,?Computer, Vol. 22, pp. 43?49, April 1989.","journal-title":"Computer"},{"issue":"No. 2","key":"CR11","doi-asserted-by":"crossref","first-page":"421","DOI":"10.1109\/4.1002","volume":"23","author":"S. Freeman","year":"1988","unstructured":"S. Freeman, ?Test Generation for Data-Path Logic: The F-Path Method,?IEEE Journal of Solid-State Circuits, Vol. 23, No. 2, pp. 421?427, April 1988.","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"CR12","doi-asserted-by":"crossref","first-page":"1137","DOI":"10.1109\/TC.1983.1676174","volume":"32","author":"H. Fujiwara","year":"1983","unstructured":"H. Fujiwara and T. Shimono, ?On the Acceleration of Test Generation Algorithms,?IEEE Trans. on Computers, Vol. C-32, pp. 1137?1144, December 1983.","journal-title":"IEEE Trans. on Computers"},{"key":"CR13","doi-asserted-by":"crossref","first-page":"215","DOI":"10.1109\/TC.1981.1675757","volume":"30","author":"P. Goel","year":"1981","unstructured":"P. Goel, ?An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits,?IEEE Trans. on Computers, Vol. C-30, pp. 215?222, March 1981.","journal-title":"IEEE Trans. on Computers"},{"key":"CR14","unstructured":"N. Gouders and R. Kaibel, ?Advanced Techniquer for Sequential Test Generation,?Proc. Europ. Test Conf., pp. 293?300, 1991."},{"key":"CR15","unstructured":"B. Hanstein, M. Johansson, W. Roth, and F. Dymann, ?Modular Testing of a VLSI Processor Chip Using the BED System,?Proc. Europ. Test Conf., p. 490, 1991."},{"key":"CR16","doi-asserted-by":"crossref","unstructured":"M. Karam, R. Leveugle, and G. Saucier, ?Hierarchical Test Generation Based on Delayed Propagation,?Proc. Int. Test Conf., pp. 739?747, 1991.","DOI":"10.1109\/TEST.1991.519739"},{"key":"CR17","doi-asserted-by":"crossref","unstructured":"G. Kr\u00fcger, ?A Tool for Hierarchical Test Generation,?Proc. Int. Conf. on Computer-Aided Design, pp. 420?423, 1988.","DOI":"10.1109\/ICCAD.1988.122541"},{"key":"CR18","unstructured":"M. Marh\u00f6fer, ?Fehlerdiagnose f\u00fcr Schaltnetze aus Modulen mit partiell injektiven Pfadfunktionen,? Springer Verlag, Informatik-Fachberichte 139."},{"key":"CR19","doi-asserted-by":"crossref","unstructured":"B.T. Murray and J.P. Hayes, ?Hierarchical Test Generation Using Precomputed Tests for Modules,?Proc. Int. Test Conf., pp. 221?229, 1988.","DOI":"10.1109\/TEST.1988.207806"},{"key":"CR20","doi-asserted-by":"crossref","unstructured":"J. Rajski and H. Cox, ?A Method to Calculate Necessary Assignments in Algorithmic Test Pattern Generation,?Proc. Int. Test Conf., pp. 25?34, 1990.","DOI":"10.1109\/TEST.1990.113997"},{"key":"CR21","doi-asserted-by":"crossref","unstructured":"J.P. Roth, ?Diagnosis of automata failures: a calculus and a method,?IBM J. Research and Development, pp. 278?291, July 1966.","DOI":"10.1147\/rd.104.0278"},{"key":"CR22","unstructured":"W. Roth, M. Johansson, and W. Glunz ?The BED Concept?A Method and a Language for Modular Test Generation,?Proc. Int. Conf. on VLSI, pp. 143?152, 1989."},{"key":"CR23","unstructured":"M. Schulz, E. Trischler, and T. Sarfert, ?SOCRATES: A Highly Efficient Automatic Test Pattern Generation System,?Proc. Int. Test Conf., pp. 1016?1026, 1987."},{"key":"CR24","unstructured":"C.-C. Su and C.R. Kime, ?Multiple Path Sensitization for Hierarchical Circuit Testing,?Proc. Int. Test Conf., pp. 152?161, 1990."},{"key":"CR25","unstructured":"E. Trischler and M. Johansson, ?The TEN Concurrent Test Engineering Environment: An Overview,? to be published in theIEEE Design and Test of Computers."}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF00993129.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/BF00993129\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF00993129","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,12,22]],"date-time":"2024-12-22T16:13:51Z","timestamp":1734884031000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BF00993129"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1995,2]]},"references-count":25,"journal-issue":{"issue":"1","published-print":{"date-parts":[[1995,2]]}},"alternative-id":["BF00993129"],"URL":"https:\/\/doi.org\/10.1007\/bf00993129","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"type":"print","value":"0923-8174"},{"type":"electronic","value":"1573-0727"}],"subject":[],"published":{"date-parts":[[1995,2]]}}}