{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:59:16Z","timestamp":1759147156415,"version":"3.32.0"},"reference-count":24,"publisher":"Springer Science and Business Media LLC","issue":"1-2","license":[{"start":{"date-parts":[[1995,1,1]],"date-time":"1995-01-01T00:00:00Z","timestamp":788918400000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[1995]]},"DOI":"10.1007\/bf00993316","type":"journal-article","created":{"date-parts":[[2005,1,14]],"date-time":"2005-01-14T18:06:31Z","timestamp":1105725991000},"page":"83-93","source":"Crossref","is-referenced-by-count":23,"title":["An exact algorithm for selecting partial scan flip-flops"],"prefix":"10.1007","volume":"7","author":[{"given":"Srimat T.","family":"Chakradhar","sequence":"first","affiliation":[]},{"given":"Arun","family":"Balakrishnan","sequence":"additional","affiliation":[]},{"given":"Vishwani D.","family":"Agrawal","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"CR1","unstructured":"E. Trischler, ?Incomplete Scan Path with an Automatic Test Generation Methodology,? inProceedings of the International Test Conference, pp. 153?162, 1980."},{"key":"CR2","doi-asserted-by":"crossref","unstructured":"M. Abramovici, J.J. Kulikowski, and R.K. Roy, ?The Best Flip-Flops to Scan,? inProceedings of the International Test Conference, pp. 166?173, 1991.","DOI":"10.1109\/TEST.1991.519507"},{"key":"CR3","doi-asserted-by":"crossref","first-page":"8","DOI":"10.1109\/54.2032","volume":"5","author":"V.D. Agrawal","year":"1988","unstructured":"V.D. Agrawal, K.T. Cheng, D.D. Johnson, and T. Lin, ?Designing Circuits with Partial Scan,?IEEE Design and Test of Computers, Vol. 5, pp. 8?15, April 1988.","journal-title":"IEEE Design and Test of Computers"},{"key":"CR4","unstructured":"H.-K.T. Ma, S. Devadas, A.R. Newton, and A. Sangiovanni-Vincentelli, ?An Incomplete Scan Design Approach to Test Generation for Sequential Machines,? inProceedings of the International Test Conference, pp. 730?734, 1988."},{"key":"CR5","doi-asserted-by":"crossref","unstructured":"V. Chickermane and J.H. Patel, ?A Fault Oriented Partial Scan Design Approach,? inProceedings of the International Conference on Computer-Aided Design, pp. 400?403, November 1991.","DOI":"10.1109\/ICCAD.1991.185287"},{"key":"CR6","doi-asserted-by":"crossref","first-page":"544","DOI":"10.1109\/12.54847","volume":"39","author":"K.T. Cheng","year":"1990","unstructured":"K.T. Cheng and V.D. Agrawal, ?A Partial Scan Method for Sequential Circuits with Feedback,?IEEE Transactions on Computers, Vol. 39, pp. 544?548, April 1990.","journal-title":"IEEE Transactions on Computers"},{"key":"CR7","doi-asserted-by":"crossref","unstructured":"D.H. Lee and S.M. Reddy, ?On-Determining Scan Flip-Flops in Partial-Scan Designs,? inProceedings of the International Conference on Computer-Aided Design, pp. 322?325, November 1990.","DOI":"10.1109\/ICCAD.1990.129914"},{"key":"CR8","unstructured":"S. Park and S.B. Akers, ?A Graph Theoretic Approach to Partial Scan Design by K-Cycle Elimination,? inProceedings of the International Test Conference, pp. 303?311, 1992."},{"key":"CR9","doi-asserted-by":"crossref","first-page":"163","DOI":"10.1007\/BF00137392","volume":"1","author":"A. Kunzmann","year":"1990","unstructured":"A. Kunzmann and H.J. Wunderlich, ?An Analytical Approach to the Partial Scan Problem,?Journal of Electronic Testing: Theory and Applications, Vol. 1, pp. 163?174, 1990.","journal-title":"Journal of Electronic Testing: Theory and Applications"},{"key":"CR10","doi-asserted-by":"crossref","first-page":"538","DOI":"10.1109\/12.54846","volume":"39","author":"R. Gupta","year":"1990","unstructured":"R. Gupta, R. Gupta, and M.A. Breuer, ?The BALLAST Methodology for Structured Partial Scan Design,?IEEE Transactions on Computers, Vol. C-39, pp. 538?544, April 1990.","journal-title":"IEEE Transactions on Computers"},{"key":"CR11","doi-asserted-by":"crossref","first-page":"127","DOI":"10.1007\/BF00137250","volume":"3","author":"H.B. Min","year":"1992","unstructured":"H.B. Min and W.A. Rogers, ?A Test Methodology for Finite State Machines using Partial Scan Design,?Journal of Electronic Testing: Theory and Applications, Vol. 3, pp. 127?137, May 1992.","journal-title":"Journal of Electronic Testing: Theory and Applications"},{"key":"CR12","doi-asserted-by":"crossref","first-page":"238","DOI":"10.1109\/TCT.1963.1082116","volume":"10","author":"D.H. Younger","year":"1963","unstructured":"D.H. Younger, ?Minimum Feedback Vertex Sets for Directed Graphs,?IEEE Transactions on Circuit Theory, Vol. 10, pp. 238?245, June 1963.","journal-title":"IEEE Transactions on Circuit Theory"},{"key":"CR13","doi-asserted-by":"crossref","first-page":"399","DOI":"10.1109\/TCT.1966.1082620","volume":"13","author":"A. Lempel","year":"1966","unstructured":"A. Lempel and I. Cederbaum, ?Minimum Feedback Arc and Vertex Sets for Directed Graphs,?IEEE Transactions on Circuit Theory, Vol. 13, pp. 399?403, December 1966.","journal-title":"IEEE Transactions on Circuit Theory"},{"key":"CR14","doi-asserted-by":"crossref","first-page":"9","DOI":"10.1109\/TCS.1975.1083961","volume":"22","author":"G.W. Smith","year":"1975","unstructured":"G.W. Smith and R.B. Walford, ?The Identification of Minimum Feedback Vertex Set of a Directed Graph,?IEEE Transactions on Circuits and Systems, Vol. 22, pp. 9?14, January 1975.","journal-title":"IEEE Transactions on Circuits and Systems"},{"key":"CR15","doi-asserted-by":"crossref","unstructured":"P. Asher and S. Malik, ?Implicit Computation of Minimum-cost Feedback Vertex Sets for Partial Scan and other Applications,? inProceedings of the 31st ACM\/IEEE Design Automation Conference, June 1994.","DOI":"10.1145\/196244.196283"},{"key":"CR16","doi-asserted-by":"crossref","first-page":"293","DOI":"10.1016\/0022-0000(88)90009-8","volume":"37","author":"E.L. Lloyd","year":"1988","unstructured":"E.L. Lloyd, M.L. Soffa, and C.C. Wang, ?On Locating Minimum Feedback Vertex Sets,?Journal of Computer and System Sciences, Vol. 37, pp. 293?311, 1988.","journal-title":"Journal of Computer and System Sciences"},{"key":"CR17","doi-asserted-by":"crossref","first-page":"470","DOI":"10.1016\/0196-6774(88)90013-2","volume":"9","author":"H. Levy","year":"1988","unstructured":"H. Levy, and L. Low, ?A Contraction Algorithm for Finding Small Cycle Cutsets,?Journal of Algorithm, Vol. 9, pp. 470?493, 1988.","journal-title":"Journal of Algorithm"},{"key":"CR18","unstructured":"E.L. Lloyd, Personal communication."},{"key":"CR19","unstructured":"H.H.S. Gundlach and K.D. Muller-Glasser, ?On Automatic Test Point Insertion in Sequential Circuits,? inProceedings of the International Test Conference, pp. 1072?1079, September 1990."},{"key":"CR20","volume-title":"Combinatorial Optimization Algorithms and Complexity","author":"C.H. Papadimitriou","year":"1982","unstructured":"C.H. Papadimitriou and K. Steiglitz,Combinatorial Optimization Algorithms and Complexity, Englewood Cliffs, New Jersey: Prentice Hall, 1982."},{"key":"CR21","unstructured":"A.W. Tucker, ?On Directed Graphs and Integer Programs,? Presentation at theSymposium on Combinatorial Problems, Princeton University, 1960."},{"key":"CR22","doi-asserted-by":"crossref","unstructured":"S. Bhawmik, C.J. Lin, K.T. Cheng, and V.D. Agrawal, ?Pascant: A Partial Scan and Test Generation System,? inCustom Integrated Circuits Conference, pp. 17.3.1?17.3.4, 1991.","DOI":"10.1109\/CICC.1991.163995"},{"key":"CR23","doi-asserted-by":"crossref","unstructured":"S.T. Chakradhar and S. Dey, ?Resynthesis and Retiming for Optimum Partial Scan,? inProceedings of the 31st ACM\/IEEE Design Automation Conference, pp. 87?93, June 1994.","DOI":"10.1145\/196244.196288"},{"key":"CR24","doi-asserted-by":"crossref","unstructured":"S.T. Chakradhar, A. Balakrishnan and V.D. Agrawal, ?An Exact Algorithm for Selecting Partial Scan Flip Flops,? inProceedings of 31st Design Automation Conference, pp. 81?86, June 1994.","DOI":"10.1145\/196244.196285"}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF00993316.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/BF00993316\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF00993316","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,12,22]],"date-time":"2024-12-22T16:16:00Z","timestamp":1734884160000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BF00993316"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1995]]},"references-count":24,"journal-issue":{"issue":"1-2","published-print":{"date-parts":[[1995]]}},"alternative-id":["BF00993316"],"URL":"https:\/\/doi.org\/10.1007\/bf00993316","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"type":"print","value":"0923-8174"},{"type":"electronic","value":"1573-0727"}],"subject":[],"published":{"date-parts":[[1995]]}}}