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It is formulated in a machine independent way and, consequently, is suitable for implementation on a range of novel parallel architectures. An operational model of data parallel computation is provided by specifying a model array processor. The specification captures the essential features of the class of array processors and it may be instantiated in order to define a particular machine. A formal operational semantics of data parallel assignment is given for the model array processor. The translation mechanism is shown to be correct. The exercise clarifies some of the issues in deciding whether or not it is feasible to translate data parallel assignment directly onto array processor architectures.<\/jats:p>","DOI":"10.1007\/bf01211307","type":"journal-article","created":{"date-parts":[[2005,2,25]],"date-time":"2005-02-25T22:17:40Z","timestamp":1109369860000},"page":"417-439","source":"Crossref","is-referenced-by-count":1,"title":["Correct translation of data parallel assignment onto array processors"],"prefix":"10.1145","volume":"6","author":[{"given":"J. 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