{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,6]],"date-time":"2025-08-06T12:48:37Z","timestamp":1754484517471},"reference-count":13,"publisher":"Springer Science and Business Media LLC","issue":"1-2","license":[{"start":{"date-parts":[[1995,8,1]],"date-time":"1995-08-01T00:00:00Z","timestamp":807235200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Form Method Syst Des"],"published-print":{"date-parts":[[1995,8]]},"DOI":"10.1007\/bf01383872","type":"journal-article","created":{"date-parts":[[2005,4,2]],"date-time":"2005-04-02T02:10:10Z","timestamp":1112407810000},"page":"27-51","source":"Crossref","is-referenced-by-count":11,"title":["A simple denotational semantics, proof theory and a validation condition generator for unit-delay VHDL"],"prefix":"10.1007","volume":"7","author":[{"given":"Peter T.","family":"Breuer","sequence":"first","affiliation":[]},{"given":"Luis S\ufffdnchez","family":"Fern\ufffdndez","sequence":"additional","affiliation":[]},{"given":"Carlos Delgado","family":"Kloos","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"CR1","unstructured":"C. Bayol et al., A process algebra interpretation of a verification-oriented overlanguage ofVHDL. InEuro- VHDL '94, 506?511, 1994."},{"key":"CR2","unstructured":"P.T. Breuer, L. S\u00e1nchez, and C. Delgado Kloos, Proof theory and a validation condition generator for VHDL. InEuro-VHDL'94, 512?517, 1994."},{"key":"CR3","doi-asserted-by":"crossref","unstructured":"P.T. Breuer, L. S\u00e1nchez, and C. Delgado Kloos, A clean formal semantics for VHDL. InEuropean Design and Test Conference'94 641?647, 1994.","DOI":"10.1109\/EDTC.1994.326810"},{"key":"CR4","series-title":"Technical Report","volume-title":"A formal semantics for VHDL based on interpreted Petri Nets","author":"W. Damm","year":"1992","unstructured":"W. Damm et al., A formal semantics for VHDL based on interpreted Petri Nets. Technical Report, University of Oldenburg, Germany, 1992."},{"key":"CR5","unstructured":"W. Damm, B. Josko, and R. Schl\u00f6r. A network-based semantics for VHDL. InEuro-DAC'93 with Euro-VHDL'93, 1993."},{"key":"CR6","doi-asserted-by":"crossref","unstructured":"C. Delgado Kloos and P.T. Breuer (eds.),Formal Semantics for VHDL. Kluwer, 1995.","DOI":"10.1007\/978-1-4615-2237-9"},{"key":"CR7","doi-asserted-by":"crossref","first-page":"576","DOI":"10.1145\/363235.363259","volume":"12","author":"C.A.R. Hoare","year":"1969","unstructured":"C.A.R. Hoare, An axiomatic basis for computer programming.Communications of the ACM, 12:576?580, October 1969.","journal-title":"Communications of the ACM"},{"key":"CR8","unstructured":"Institute of Electrical and Electronics Engineers, 345 East 47th Street, New York, USA.IEEE Standard VHDL Language Reference Manual, 1988. IEEE Std. 1076?1987."},{"key":"CR9","unstructured":"W. Mueller, The semantics of behavioral VHDL descriptions. InEuro-VHDL'94, 1994."},{"key":"CR10","unstructured":"S. Olcoz and J.M. Colom, Petri Net based analysis of VHDL descriptions. In2nd International Conference EuroVHDL 91, Sweden, September 1991."},{"key":"CR11","unstructured":"S. Olcoz and J.M. Colom. Towards a formal semantics of IEEE VHDL 1076. InEuro-DAC'93 with Euro-VHDL'93, 1993."},{"key":"CR12","volume-title":"Una sem\u00e1ntica formal para VHDL mediante streams. Technical Report, ETSI Telecomunicaci\u00f3n","author":"L. S\u00e1nchez","year":"1992","unstructured":"L. S\u00e1nchez, Una sem\u00e1ntica formal para VHDL mediante streams. Technical Report, ETSI Telecomunicaci\u00f3n, Universidad Polit\u00e9cnica de Madrid, Ciudad Universitaria, Madrid, Spain, December 1992."},{"key":"CR13","series-title":"Technical Report","volume-title":"A formalization of the VHDL simulation cycle","author":"J.P. Tassel van","year":"1992","unstructured":"J.P. van Tassel, A formalization of the VHDL simulation cycle. Technical Report 249, University of Cambridge, Computer Laboratory, UK, 1992."}],"container-title":["Formal Methods in System Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF01383872.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/BF01383872\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF01383872","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,2]],"date-time":"2019-05-02T16:04:45Z","timestamp":1556813085000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BF01383872"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1995,8]]},"references-count":13,"journal-issue":{"issue":"1-2","published-print":{"date-parts":[[1995,8]]}},"alternative-id":["BF01383872"],"URL":"https:\/\/doi.org\/10.1007\/bf01383872","relation":{},"ISSN":["0925-9856","1572-8102"],"issn-type":[{"value":"0925-9856","type":"print"},{"value":"1572-8102","type":"electronic"}],"subject":[],"published":{"date-parts":[[1995,8]]}}}