{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,6]],"date-time":"2025-08-06T13:44:52Z","timestamp":1754487892604},"reference-count":26,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[1994,1,1]],"date-time":"1994-01-01T00:00:00Z","timestamp":757382400000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Form Method Syst Des"],"published-print":{"date-parts":[[1994,1]]},"DOI":"10.1007\/bf01383956","type":"journal-article","created":{"date-parts":[[2005,4,2]],"date-time":"2005-04-02T08:40:21Z","timestamp":1112431221000},"page":"33-75","source":"Crossref","is-referenced-by-count":14,"title":["Analysis and identification of speed-independent circuits on an event model"],"prefix":"10.1007","volume":"4","author":[{"given":"M.","family":"Kishinevsky","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Kondratyev","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Taubin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"V.","family":"Varshavsky","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"CR1","volume-title":"Introduction to VLSI Systems","author":"C.L. Seitz","year":"1980","unstructured":"C.L. Seitz. System timing. InIntroduction to VLSI Systems, C. Mead and L. Conway, (eds.), Addison-Wesley, Reading, MA, 1980, ch. 7."},{"key":"CR2","doi-asserted-by":"crossref","DOI":"10.1007\/978-94-009-0487-3","volume-title":"Self-Timed Control of Concurrent Processes","author":"V.I. Varshavsky","year":"1990","unstructured":"V.I. Varshavsky, M.A. Krishnevsky, V.B. Marakhovsky, V.A. Peschansky, L. Ya. Rosenblum, A.R. Taubin, and B.S. Tzirlin.Self-Timed Control of Concurrent Processes. Kluwer Academic Publishers, Boston, 1990."},{"key":"CR3","volume-title":"UT Year of Programming Institute on Concurrent Programming","author":"A.J. Martin","year":"1989","unstructured":"A.J. Martin. Programming in VLSI: From communicating processes to delay-insensitive circuits. InUT Year of Programming Institute on Concurrent Programming, C.A.R. Hoare (ed.), Addison-Wesley, Reading, MA, 1989."},{"key":"CR4","first-page":"71","volume-title":"Formal Methods for VLSI Design","author":"J. Staunstrup","year":"1990","unstructured":"J. Staunstrup and M.R. Greenstreet. Synchronized transitions. InFormal Methods for VLSI Design, J. Staunstrup (ed.), Elsevier, Amsterdam, 1990, pp. 71?128."},{"key":"CR5","first-page":"150","volume-title":"Proceedings of the International Conference on Computer Design (ICCD'88)","author":"C.H. Berkel van","year":"1988","unstructured":"C.H. (Kees) van Berkel, C. Niessen, M. Rem and S. Saeijs. VLSI programming and Silicon Compilation. InProceedings of the International Conference on Computer Design (ICCD'88), IEEE Computer Society Press, Rye Brook, NY, 1988, pp. 150?166."},{"key":"CR6","doi-asserted-by":"crossref","first-page":"197","DOI":"10.1109\/EDAC.1991.206389","volume-title":"Proceedings of the European Conference on Design Automation (EDAC'91)","author":"M.A. Kishinevsky","year":"1991","unstructured":"M.A. Kishinevsky, A. Yu. Kondratyev, and A.R. Taubin. Formal methods for self-timed design. InProceedings of the European Conference on Design Automation (EDAC'91), IEEE Computer Society Press, Amsterdam, 1991, pp. 197?201."},{"key":"CR7","first-page":"67","volume-title":"Proceedings of 1985 Chapel Hill Conference on Very Large Scale Integration","author":"Ch.E. Molnar","year":"1985","unstructured":"Ch.E. Molnar, T.P. Fang, and F.U. Rosenberg. Synthesis of delay-insensitive modules. InProceedings of 1985 Chapel Hill Conference on Very Large Scale Integration, Computer Science Press, Rockville, MD, 1985, pp. 67?86."},{"key":"CR8","volume-title":"Performance Analysis and Optimization of Asynchronous Circuits","author":"S.M. Burns","year":"1991","unstructured":"S.M. Burns.Performance Analysis and Optimization of Asynchronous Circuits, Ph.D. thesis, California Institute of Technology, Computer Science Department, Pasadena, CA, 1991."},{"key":"CR9","first-page":"275","volume-title":"Proceedings of IFIP 2nd Workshop on Designing Correct Circuits","author":"M.A. Kishinevsky","year":"1992","unstructured":"M.A. Kishinevsky, A.Yu. Kondratyev, A.R. Taubin, and V.I. Varshavsky. Analysis and identification of Self-Timed Circuits. InProceedings of IFIP 2nd Workshop on Designing Correct Circuits, Elsevier, Lyngby, Denmark, 1992, pp. 275?287."},{"key":"CR10","first-page":"204","volume-title":"Proceedings of an International Symposium on the Theory of Switching","author":"D.E. Muller","year":"1959","unstructured":"D.E. Muller and W.S. Bartky. A theory of asynchronous circuits. InProceedings of an International Symposium on the Theory of Switching. Harvard University Press, Cambridge, MA, 1959, pp. 204?243."},{"key":"CR11","doi-asserted-by":"crossref","unstructured":"Jo C. Ebergen and S. Gingras. A verifier for network decompositions of command-based specifications. InProceedings of the 26th Hawaii International Conference on System Sciences, IEEE Computer Society Press, Wailea, Hawaii, Vol. 1, pp. 310?318.","DOI":"10.1109\/HICSS.1993.270634"},{"key":"CR12","unstructured":"M.A. Kishinevsky,Implementation and Analysis of Self-Timed Circuits, Ph. D. thesis, Leningrad Electrical Engineering Institute, Department of Computer Science, 1982."},{"key":"CR13","doi-asserted-by":"crossref","unstructured":"W.D. Frazer and D.E. Muller. A method for factoring and action of asynchronous circuits. InProceedings of the First Annual AIEE Symposium on Switching Circuit Theory and Logical Design, New York, 1961, pp. 246?249.","DOI":"10.1109\/FOCS.1961.4"},{"issue":"3","key":"CR14","doi-asserted-by":"crossref","first-page":"301","DOI":"10.1016\/0167-9260(92)90033-U","volume":"13","author":"P.A. Beerel","year":"1992","unstructured":"P.A. Beerel and T.H.-Y. Meng. Semi-modularity and testability of speed-independent circuits,Integration, 13(3): 301?322, 1992.","journal-title":"Integration"},{"key":"CR15","series-title":"Research Report PIN-2","volume-title":"Theory, methods and software support for self-timing design","author":"V.I. Varshavsky","year":"1990","unstructured":"V.I. Varshavsky, et al. Theory, methods and software support for self-timing design, Research Report PIN-2, R&D Coop ?Trassa.? Institute of Informatics Problems, Leningrad, Moscow, 1990."},{"issue":"6","key":"CR16","doi-asserted-by":"crossref","first-page":"720","DOI":"10.1145\/63526.63532","volume":"32","author":"I.E. Sutherland","year":"1989","unstructured":"I.E. Sutherland. Micropipelines,Communications of the ACM, 32(6):720?738, 1989.","journal-title":"Communications of the ACM"},{"key":"CR17","unstructured":"G. Birkhoff.Lattice Theory. American Mathematical Society, Providence, RI, 1967."},{"key":"CR18","volume-title":"Synthesis of Self-Timed VLSI Circuits from Graph-Theoretic Specifications","author":"T.A. Chu","year":"1987","unstructured":"T.A. Chu,Synthesis of Self-Timed VLSI Circuits from Graph-Theoretic Specifications. Ph.D. thesis, Massachusetts Institute of Technology, Cambridge, MA, 1987."},{"issue":"2","key":"CR19","first-page":"61","volume":"26","author":"V.I. Varshavsky","year":"1989","unstructured":"V.I. Varshavsky, M.A. Kishinevsky, A.Yu. Kondratyev, L.Ya. Rosenblum, and A.R. Taubin. Models for specification and analysis of processes in asynchronous circuits.Soviet Journal of Computer and Systems Sciences, 26(2): 61?76, 1989.","journal-title":"Soviet Journal of Computer and Systems Sciences"},{"key":"CR20","first-page":"331","volume":"6","author":"M.A. Kishinevsky","year":"1993","unstructured":"M.A. Kishinevsky, A.Yu. Kondratyev, and A.R. Taubin. Specification and analysis of self-timed circuits,Journal of VLSI Signal Processing, Special Issue on Asynchronous Design, 6:331?349, 1993.","journal-title":"Journal of VLSI Signal Processing, Special Issue on Asynchronous Design"},{"key":"CR21","doi-asserted-by":"crossref","unstructured":"A. Yakovlev, L. Lavagno and A. Sangiovanni-Vincentelli. A unified signal transition graph model for asynchronous control circuit synthesis. Technical Report UCB\/ERL M92\/78, University of California-Berkeley, July 1992.","DOI":"10.1109\/ICCAD.1992.279390"},{"key":"CR22","unstructured":"A.Yu. Kondratyev.Design at Self-Timed Circuits from Change Diagrams. Ph. D. thesis, Leningrad Electrical Engineering Institute, Department of Computer Science, 1987."},{"key":"CR23","volume-title":"Proceedings of Working Conference on Asynchronous Design Methodologies","author":"J. Spars\u00f8","year":"1993","unstructured":"J. Spars\u00f8, C.D. Nielsen, L.S. Nielsen, and J. Staunstrup. Design of self-timed multipliers: A Comparison. InProceedings of Working Conference on Asynchronous Design Methodologies, Elsevier, Manchester, March 1993."},{"key":"CR24","doi-asserted-by":"crossref","DOI":"10.7551\/mitpress\/6874.001.0001","volume-title":"Trace Theory for Automatic Hierarchical Verification of Speed-Independent Circuits","author":"D. Dill","year":"1989","unstructured":"D. Dill.Trace Theory for Automatic Hierarchical Verification of Speed-Independent Circuits. MIT Press, Cambridge, MA, 1989."},{"key":"CR25","unstructured":"L. Ya. Rosenblum. The Signal graph language for the modeling of exchange protocols and aperiodic circuits. InProceedings ?Simulation of digital control and computer systems.? Sverdlovsk, IMM, 1981 (in Russian)."},{"key":"CR26","doi-asserted-by":"crossref","first-page":"511","DOI":"10.1016\/S0022-0000(71)80013-2","volume":"5","author":"F. Commoner","year":"1971","unstructured":"F. Commoner, A.W. Holt, S. Even, and A. Pnueli. Marked directed graphs.Journal of Computer and System Sciences, 5: 511?523, 1971.","journal-title":"Journal of Computer and System Sciences"}],"container-title":["Formal Methods in System Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF01383956.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/BF01383956\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF01383956","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,4,6]],"date-time":"2020-04-06T16:32:48Z","timestamp":1586190768000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BF01383956"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1994,1]]},"references-count":26,"journal-issue":{"issue":"1","published-print":{"date-parts":[[1994,1]]}},"alternative-id":["BF01383956"],"URL":"https:\/\/doi.org\/10.1007\/bf01383956","relation":{},"ISSN":["0925-9856","1572-8102"],"issn-type":[{"value":"0925-9856","type":"print"},{"value":"1572-8102","type":"electronic"}],"subject":[],"published":{"date-parts":[[1994,1]]}}}